@@ -610,15 +610,15 @@ struct DFSDM_CHANNEL_DOMAIN {
610610 }
611611 }
612612 // validate buffers
613- if (active_channels > 1 && entries[i].config_filter .type_conv == Type_Conversion::Regular){
613+ if (active_channels > 1 &&
614+ entries[i].config_filter .type_conv == Type_Conversion::Regular) {
614615 compile_error (" Not allowed more than 1 channel per filter in Regular Mode" );
615616 }
616617 if (active_channels > 1 && cfgs[i].dma_enable == Dma::Enable) {
617618 // Look the entry because the data that I want to check is easier to access
618619 if (entries[i].config_filter .jscan == Injected_Mode::Single) {
619- compile_error (
620- " Not allowed more than 1 channel per filter + Injected_Mode::Single_conversion"
621- );
620+ compile_error (" Not allowed more than 1 channel per filter + "
621+ " Injected_Mode::Single_conversion" );
622622 }
623623 for (size_t j = 0 ; j < 8 ; j++) {
624624 if (channels_filter[cfgs[i].filter ][j] > 1 ) {
@@ -724,13 +724,15 @@ struct DFSDM_CHANNEL_DOMAIN {
724724 DFSDM1_Channel6,
725725 DFSDM1_Channel7
726726 };
727- static void inline start_reg_conv_filter (uint8_t filter){
728- if (filter > 3 ) ErrorHandler (" Only filters from 0..3" );
727+ static void inline start_reg_conv_filter (uint8_t filter) {
728+ if (filter > 3 )
729+ ErrorHandler (" Only filters from 0..3" );
729730 filter_hw[filter]->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; // regular
730731 }
731- static void inline start_inj_conv_filter (uint8_t filter){
732- if (filter > 3 ) ErrorHandler (" Only filters from 0..3" );
733- filter_hw[filter]->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; // injected
732+ static void inline start_inj_conv_filter (uint8_t filter) {
733+ if (filter > 3 )
734+ ErrorHandler (" Only filters from 0..3" );
735+ filter_hw[filter]->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; // injected
734736 }
735737 static DMADomain::Instance*
736738 find_dma_instance (uint32_t request, std::span<DMADomain::Instance> dma_peripherals) {
@@ -897,14 +899,15 @@ struct DFSDM_CHANNEL_DOMAIN {
897899 " channel buffer" );
898900 }
899901 return (
900- static_cast <int32_t >(this ->buffer [pos] & DFSDM_FLTJDATAR_JDATA_Msk) >> DFSDM_FLTJDATAR_JDATA_Pos
902+ static_cast <int32_t >(this ->buffer [pos] & DFSDM_FLTJDATAR_JDATA_Msk) >>
903+ DFSDM_FLTJDATAR_JDATA_Pos
901904 ); // The constants values are the same for regular than injected
902905 }
903906 int32_t read () {
904907 return (
905908 static_cast <int32_t >(this ->buffer [0 ] & DFSDM_FLTJDATAR_JDATA_Msk) >>
906909 DFSDM_FLTJDATAR_JDATA_Pos
907- );
910+ );
908911 }
909912 uint32_t check_latency_cycles () {
910913 return filter_regs->FLTCNVTIMR >> DFSDM_FLTCNVTIMR_CNVCNT_Pos;
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