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oganigloganigl
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add fucking iindent
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Lines changed: 178 additions & 149 deletions

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‎Inc/HALAL/Models/TimerDomain/TimerDomain.hpp‎

Lines changed: 81 additions & 88 deletions
Original file line numberDiff line numberDiff line change
@@ -149,32 +149,32 @@ enum TimerRequest : uint8_t {
149149
Basic_6 = 6,
150150
Basic_7 = 7,
151151
};
152-
enum class SelectionTrigger1 : uint32_t {
153-
Reset = TIM_TRGO_RESET,
154-
Enable = TIM_TRGO_ENABLE,
155-
Update = TIM_TRGO_UPDATE,
156-
General_Compare = TIM_TRGO_OC1,
157-
Compare_channel1 = TIM_TRGO_OC1REF,
158-
Compare_channel2 = TIM_TRGO_OC2REF,
159-
Compare_channel3 = TIM_TRGO_OC3REF,
160-
Compare_channel4 = TIM_TRGO_OC4REF
161-
};
162-
enum class SelectionTrigger2 : uint32_t {
163-
Reset = TIM_TRGO2_RESET,
164-
Enable = TIM_TRGO2_ENABLE,
165-
Update = TIM_TRGO2_UPDATE,
166-
General_Compare = TIM_TRGO2_OC1,
167-
Compare_channel1 = TIM_TRGO2_OC1REF,
168-
Compare_channel2 = TIM_TRGO2_OC2REF,
169-
Compare_channel3 = TIM_TRGO2_OC3REF,
170-
Compare_channel4 = TIM_TRGO2_OC4REF,
171-
Compare_channel5 = TIM_TRGO2_OC5REF,
172-
Compare_channel6 = TIM_TRGO2_OC6REF,
173-
Compare_channel4_R_channel6_F = TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING,
174-
Compare_channel4_R_channel6_R = TIM_TRGO2_OC4REF_RISING_OC6REF_RISING,
175-
Compare_channel5_R_channel6_F = TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING,
176-
Compare_channel5_R_channel6_R = TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
177-
};
152+
enum class SelectionTrigger1 : uint32_t {
153+
Reset = TIM_TRGO_RESET,
154+
Enable = TIM_TRGO_ENABLE,
155+
Update = TIM_TRGO_UPDATE,
156+
General_Compare = TIM_TRGO_OC1,
157+
Compare_channel1 = TIM_TRGO_OC1REF,
158+
Compare_channel2 = TIM_TRGO_OC2REF,
159+
Compare_channel3 = TIM_TRGO_OC3REF,
160+
Compare_channel4 = TIM_TRGO_OC4REF
161+
};
162+
enum class SelectionTrigger2 : uint32_t {
163+
Reset = TIM_TRGO2_RESET,
164+
Enable = TIM_TRGO2_ENABLE,
165+
Update = TIM_TRGO2_UPDATE,
166+
General_Compare = TIM_TRGO2_OC1,
167+
Compare_channel1 = TIM_TRGO2_OC1REF,
168+
Compare_channel2 = TIM_TRGO2_OC2REF,
169+
Compare_channel3 = TIM_TRGO2_OC3REF,
170+
Compare_channel4 = TIM_TRGO2_OC4REF,
171+
Compare_channel5 = TIM_TRGO2_OC5REF,
172+
Compare_channel6 = TIM_TRGO2_OC6REF,
173+
Compare_channel4_R_channel6_F = TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING,
174+
Compare_channel4_R_channel6_R = TIM_TRGO2_OC4REF_RISING_OC6REF_RISING,
175+
Compare_channel5_R_channel6_F = TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING,
176+
Compare_channel5_R_channel6_R = TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
177+
};
178178

179179
// Alternate functions for timers
180180
enum class TimerAF {
@@ -287,15 +287,15 @@ struct TimerDomain {
287287
TimerRequest request;
288288
uint8_t pin_count;
289289
std::array<TimerPin, 7> pins; /* this won't be read in Timer constructor */
290-
SelectionTrigger1 trgo1{SelectionTrigger1::Reset};
291-
SelectionTrigger2 trgo2{SelectionTrigger2::Reset};
290+
SelectionTrigger1 trgo1{SelectionTrigger1::Reset};
291+
SelectionTrigger2 trgo2{SelectionTrigger2::Reset};
292292
};
293293

294-
struct Config {
295-
uint8_t timer_idx;
296-
SelectionTrigger1 trgo1;
297-
SelectionTrigger2 trgo2;
298-
};
294+
struct Config {
295+
uint8_t timer_idx;
296+
SelectionTrigger1 trgo1;
297+
SelectionTrigger2 trgo2;
298+
};
299299

300300
static constexpr TIM_HandleTypeDef* hal_handles[16] = { // general purpose timers
301301
&htim2,
@@ -522,38 +522,38 @@ struct TimerDomain {
522522
}
523523
}
524524

525-
// anything uninitialized will be 0
526-
template <typename... T>
527-
consteval Timer(Entry ent, T... pinargs)
528-
: e(ent.name,
529-
ent.request,
530-
sizeof...(pinargs),
531-
std::array<TimerPin, 7>({
532-
GetPinFromIdx(pinargs, 0),
533-
GetPinFromIdx(pinargs, 1),
534-
GetPinFromIdx(pinargs, 2),
535-
GetPinFromIdx(pinargs, 3),
536-
GetPinFromIdx(pinargs, 4),
537-
GetPinFromIdx(pinargs, 5),
538-
GetPinFromIdx(pinargs, 6),
539-
}),
540-
ent.trgo1,
541-
ent.trgo2),
542-
gpio0(GetGPIOFromIdx(pinargs, ent.request, 0)),
543-
gpio1(GetGPIOFromIdx(pinargs, ent.request, 1)),
544-
gpio2(GetGPIOFromIdx(pinargs, ent.request, 2)),
545-
gpio3(GetGPIOFromIdx(pinargs, ent.request, 3)),
546-
gpio4(GetGPIOFromIdx(pinargs, ent.request, 4)),
547-
gpio5(GetGPIOFromIdx(pinargs, ent.request, 5)),
548-
gpio6(GetGPIOFromIdx(pinargs, ent.request, 6)) {
549-
static_assert(
550-
(std::is_same_v<T, TimerPin> && ...),
551-
"All template arguments must be of type TimerPin"
552-
);
553-
if (sizeof...(pinargs) > 7) {
554-
ST_LIB::compile_error("Max 7 pins per timer");
555-
}
525+
// anything uninitialized will be 0
526+
template <typename... T>
527+
consteval Timer(Entry ent, T... pinargs)
528+
: e(ent.name,
529+
ent.request,
530+
sizeof...(pinargs),
531+
std::array<TimerPin, 7>({
532+
GetPinFromIdx(pinargs, 0),
533+
GetPinFromIdx(pinargs, 1),
534+
GetPinFromIdx(pinargs, 2),
535+
GetPinFromIdx(pinargs, 3),
536+
GetPinFromIdx(pinargs, 4),
537+
GetPinFromIdx(pinargs, 5),
538+
GetPinFromIdx(pinargs, 6),
539+
}),
540+
ent.trgo1,
541+
ent.trgo2),
542+
gpio0(GetGPIOFromIdx(pinargs, ent.request, 0)),
543+
gpio1(GetGPIOFromIdx(pinargs, ent.request, 1)),
544+
gpio2(GetGPIOFromIdx(pinargs, ent.request, 2)),
545+
gpio3(GetGPIOFromIdx(pinargs, ent.request, 3)),
546+
gpio4(GetGPIOFromIdx(pinargs, ent.request, 4)),
547+
gpio5(GetGPIOFromIdx(pinargs, ent.request, 5)),
548+
gpio6(GetGPIOFromIdx(pinargs, ent.request, 6)) {
549+
static_assert(
550+
(std::is_same_v<T, TimerPin> && ...),
551+
"All template arguments must be of type TimerPin"
552+
);
553+
if (sizeof...(pinargs) > 7) {
554+
ST_LIB::compile_error("Max 7 pins per timer");
556555
}
556+
}
557557

558558
template <class Ctx> consteval void inscribe(Ctx& ctx) const {
559559
if (e.pin_count > 0) {
@@ -583,8 +583,8 @@ struct TimerDomain {
583583
.request = e.request,
584584
.pin_count = e.pin_count,
585585
.pins = e.pins,
586-
.trgo1 = e.trgo1,
587-
.trgo2 = e.trgo2
586+
.trgo1 = e.trgo1,
587+
.trgo2 = e.trgo2
588588
};
589589
ctx.template add<TimerDomain>(local_entry, this);
590590
}
@@ -638,8 +638,8 @@ struct TimerDomain {
638638

639639
Config cfg = {
640640
.timer_idx = timer_idxmap[reqint],
641-
.trgo1 = requests[i].trgo1,
642-
.trgo2 = requests[i].trgo2
641+
.trgo1 = requests[i].trgo1,
642+
.trgo2 = requests[i].trgo2
643643
};
644644
cfgs[cfg_idx++] = cfg;
645645

@@ -670,11 +670,8 @@ struct TimerDomain {
670670
}
671671

672672
uint8_t reqint = remaining_32bit_timers[count_32bit_requests];
673-
Config cfg = {
674-
.timer_idx = timer_idxmap[reqint],
675-
.trgo1 = e.trgo1,
676-
.trgo2 = e.trgo2
677-
};
673+
Config cfg =
674+
{.timer_idx = timer_idxmap[reqint], .trgo1 = e.trgo1, .trgo2 = e.trgo2};
678675
cfgs[cfg_idx++] = cfg;
679676

680677
// unordered remove
@@ -721,11 +718,7 @@ struct TimerDomain {
721718
ST_LIB::compile_error("This only processes TimerRequest::AnyGeneralPurpose");
722719
}
723720
uint8_t reqint = remaining_timers[i];
724-
Config cfg = {
725-
.timer_idx = timer_idxmap[reqint],
726-
.trgo1 = e.trgo1,
727-
.trgo2 = e.trgo2
728-
};
721+
Config cfg = {.timer_idx = timer_idxmap[reqint], .trgo1 = e.trgo1, .trgo2 = e.trgo2};
729722
cfgs[cfg_idx++] = cfg;
730723
}
731724

@@ -736,7 +729,7 @@ struct TimerDomain {
736729
struct Instance {
737730
TIM_TypeDef* tim;
738731
TIM_HandleTypeDef* hal_tim;
739-
TIM_MasterConfigTypeDef master{};
732+
TIM_MasterConfigTypeDef master{};
740733
uint8_t timer_idx;
741734
};
742735

@@ -808,15 +801,15 @@ struct TimerDomain {
808801
inst->tim = tim;
809802
inst->hal_tim = handle;
810803
inst->timer_idx = e.timer_idx;
811-
TIM_MasterConfigTypeDef sMasterConfig = {};
812-
sMasterConfig.MasterOutputTrigger = static_cast<uint32_t>(e.trgo1);
813-
sMasterConfig.MasterOutputTrigger2 = static_cast<uint32_t>(e.trgo2);
814-
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
815-
inst->master = sMasterConfig;
816-
if (HAL_TIMEx_MasterConfigSynchronization(inst->hal_tim, &sMasterConfig) !=
817-
HAL_OK) {
818-
ErrorHandler("Unable to configure master synch");
819-
}
804+
TIM_MasterConfigTypeDef sMasterConfig = {};
805+
sMasterConfig.MasterOutputTrigger = static_cast<uint32_t>(e.trgo1);
806+
sMasterConfig.MasterOutputTrigger2 = static_cast<uint32_t>(e.trgo2);
807+
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
808+
inst->master = sMasterConfig;
809+
if (HAL_TIMEx_MasterConfigSynchronization(inst->hal_tim, &sMasterConfig) !=
810+
HAL_OK) {
811+
ErrorHandler("Unable to configure master synch");
812+
}
820813
}
821814
}
822815
};

‎Inc/HALAL/Services/DFSDM/DFSDM.hpp‎

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -635,7 +635,8 @@ struct DFSDM_CHANNEL_DOMAIN {
635635
if (channel_order[i] == -1)
636636
continue;
637637
auto& cfg = cfgs[channel_order[i]];
638-
// If regular conversion give the whole buffer to the channels due to only one channel per filter
638+
// If regular conversion give the whole buffer to the channels due to only one channel
639+
// per filter
639640
cfg.buffer_pos_ini = buffer_pos[cfg.filter];
640641
buffer_pos[cfg.filter] += cfg.buffer_size;
641642
}
@@ -663,8 +664,10 @@ struct DFSDM_CHANNEL_DOMAIN {
663664
}
664665
return false;
665666
}
666-
static consteval std::size_t
667-
dma_contribution_count(std::span<const Config> cfgs, std::span<const DMADomain::Entry> dma_entries) {
667+
static consteval std::size_t dma_contribution_count(
668+
std::span<const Config> cfgs,
669+
std::span<const DMADomain::Entry> dma_entries
670+
) {
668671
std::size_t count = 0;
669672
for (uint8_t fidx = 0; fidx < 4U; ++fidx) {
670673
if (!uses_filter_dma(fidx, cfgs)) {
@@ -682,8 +685,10 @@ struct DFSDM_CHANNEL_DOMAIN {
682685
return count;
683686
}
684687
template <std::size_t ExtraN>
685-
static consteval std::array<DMADomain::Entry, ExtraN>
686-
build_dma_contributions(std::span<const DMADomain::Entry> dma_entries, std::span<const Config> cfgs) {
688+
static consteval std::array<DMADomain::Entry, ExtraN> build_dma_contributions(
689+
std::span<const DMADomain::Entry> dma_entries,
690+
std::span<const Config> cfgs
691+
) {
687692
std::array<DMADomain::Entry, ExtraN> extra{};
688693
std::size_t cursor = 0;
689694

‎Inc/MockedDrivers/stm32h7xx_hal_mock.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1039,7 +1039,8 @@ static inline HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(
10391039
return HAL_OK;
10401040
}
10411041

1042-
// ==================== DFSDM TypeDef (non-volatile for simulator, compatible with constexpr) ====================
1042+
// ==================== DFSDM TypeDef (non-volatile for simulator, compatible with constexpr)
1043+
// ====================
10431044
typedef struct {
10441045
uint32_t CHCFGR1;
10451046
uint32_t CHCFGR2;
@@ -1069,9 +1070,9 @@ typedef struct {
10691070
// Simulator DFSDM peripheral storage (mutable for simulator mode, no volatile)
10701071
#ifdef __cplusplus
10711072
namespace {
1072-
inline DFSDM_Channel_TypeDef dfsdm1_ch_storage[8]{};
1073-
inline DFSDM_Filter_TypeDef dfsdm1_f_storage[4]{};
1074-
}
1073+
inline DFSDM_Channel_TypeDef dfsdm1_ch_storage[8]{};
1074+
inline DFSDM_Filter_TypeDef dfsdm1_f_storage[4]{};
1075+
} // namespace
10751076
#endif
10761077

10771078
// Pointers that can be used in constexpr contexts

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