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Add Hardfault check #536
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Add Hardfault check #536
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cf761bb
Added party when hard_fault
oganigl 4037346
eliminate systick
oganigl c0d7a75
Add breakpoint to read hard fault when debugging
oganigl a6a1cc4
add no optimization to the delay
oganigl 6266c18
add a ifdef for the speed of the blinking depending if it's a board …
oganigl 5279511
add call trace max depth
oganigl bc5c058
Merge branch 'development' into feature/hard_fault_check
oganigl 814b938
create a unique folder for hard_fault
oganigl 7f4d908
change folders name
oganigl bed7044
add memory space for hard_fault in linker script
oganigl e2a5617
always is a semicolon the problem
oganigl File filter
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,56 @@ | ||
| #ifndef __HARD_FAULT_TRACE | ||
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| #define __HARD_FAULT_TRACE | ||
| #include "stm32h7xx_ll_gpio.h" | ||
| #include "stm32h7xx_ll_bus.h" | ||
| #include "stm32h7xx_ll_tim.h" | ||
| #define METADATA_FLASH_ADDR (0x080DFD00) //Metadata pool flash address | ||
| #define HF_FLASH_ADDR (0x080C0000U) //Hard_fault_flash address | ||
| #define HF_FLAG_VALUE (0xFF00FF00U) //Flag to know if already is written information in the flash | ||
| #define METADATA_FLASH_SIZE (0X100U) | ||
| #define HARD_FAULT_FLASH_SIZE (0X200U) | ||
| #define CALL_TRACE_MAX_DEPTH 16 | ||
| typedef struct __attribute__((packed)) ContextStateFrame { | ||
| uint32_t r0; | ||
| uint32_t r1; | ||
| uint32_t r2; | ||
| uint32_t r3; | ||
| uint32_t r12; | ||
| uint32_t lr; | ||
| uint32_t return_address; | ||
| uint32_t xpsr; | ||
| } sContextStateFrame; | ||
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| typedef struct __attribute__((packed)) HardFaultLog{ | ||
| uint32_t HF_flag; | ||
| sContextStateFrame frame; | ||
| union{ | ||
| uint32_t cfsr; | ||
| struct CfSrFields{ | ||
| uint8_t MMFSR; | ||
| uint8_t BFSR; | ||
| uint16_t UFSR; | ||
| }fields; | ||
| }CfsrDecode; | ||
| union{ | ||
| uint32_t Nothing_Valid; | ||
| uint32_t MMAR_VALID; | ||
| uint32_t BFAR_VALID; | ||
| }fault_address; | ||
| struct __attribute__((packed)){ | ||
| uint32_t depth; | ||
| uint32_t pcs[CALL_TRACE_MAX_DEPTH]; | ||
| }CallTrace; | ||
| }HardFaultLog; // 112 bytes this estructure | ||
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| #ifdef __cplusplus | ||
| extern "C" { | ||
| #endif | ||
| void Hard_fault_check(void); | ||
| #ifdef __cplusplus | ||
| } | ||
| #endif | ||
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| #endif |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,69 @@ | ||
| #include "HALAL/Benchmarking_toolkit/HardfaultTrace.h" | ||
| #ifdef NUCLEO | ||
| #define REPS 200000 | ||
| #endif | ||
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| #ifdef BOARD | ||
| #define REPS 600000 // Three times faster because the board frequency | ||
| #endif | ||
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| extern GPIO_TypeDef* ports_hard_fault[]; | ||
| extern uint16_t pins_hard_fault[]; | ||
| extern uint8_t hard_fault_leds_count; | ||
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| static void LED_Blink(); | ||
| static void LED_init(void); | ||
| static void EnableGPIOClock(GPIO_TypeDef* port); | ||
| static void InitGPIO_Output(GPIO_TypeDef* port,uint16_t pin); | ||
| static void delay(); | ||
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| __attribute__((optimize("O0"))) | ||
| static void delay(){ | ||
| for(volatile uint64_t i = 0; i < REPS; i++){ | ||
| __NOP(); | ||
| } | ||
| } | ||
| static void LED_Blink(){ | ||
| for(volatile int i = 0; i < hard_fault_leds_count;i++){ | ||
| LL_GPIO_TogglePin(ports_hard_fault[i],pins_hard_fault[i]); | ||
| } | ||
| delay(); | ||
| } | ||
| static void LED_init(void){ | ||
| for(int i = 0; i < hard_fault_leds_count;i++){ | ||
| EnableGPIOClock(ports_hard_fault[i]); | ||
| InitGPIO_Output(ports_hard_fault[i],pins_hard_fault[i]); | ||
| } | ||
| } | ||
| void Hard_fault_check(void){ | ||
| if(*(volatile uint32_t*)HF_FLASH_ADDR == HF_FLAG_VALUE){ | ||
| volatile HardFaultLog log; | ||
| memcpy(&log,(void*)HF_FLASH_ADDR,sizeof(HardFaultLog)); | ||
| #ifdef DEBUG | ||
| __asm("bkpt 1"); | ||
| #endif | ||
| LED_init(); | ||
| while(1){ | ||
| LED_Blink(); | ||
| } | ||
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| } | ||
| } | ||
| static void EnableGPIOClock(GPIO_TypeDef* port){ | ||
| if(port == GPIOA) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOA); | ||
| else if(port == GPIOB) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOB); | ||
| else if(port == GPIOC) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOC); | ||
| else if(port == GPIOD) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOD); | ||
| else if(port == GPIOE) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOE); | ||
| else if(port == GPIOF) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOF); | ||
| else if(port == GPIOG) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOG); | ||
| else if(port == GPIOJ) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOJ); | ||
| else if(port == GPIOK) LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOK); | ||
| } | ||
| static void InitGPIO_Output(GPIO_TypeDef* port,uint16_t pin){ | ||
| LL_GPIO_SetPinMode(port, pin, LL_GPIO_MODE_OUTPUT); | ||
| LL_GPIO_SetPinOutputType(port, pin, LL_GPIO_OUTPUT_PUSHPULL); | ||
| LL_GPIO_SetPinSpeed(port, pin, LL_GPIO_SPEED_FREQ_LOW); | ||
| LL_GPIO_SetPinPull(port, pin, LL_GPIO_PULL_NO); | ||
| } | ||
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