Merge branch 'main' into refactor/EXTI

Author: jorgesg82

.vscode/launch.json

@@ -24,13 +24,13 @@
         "monitor reset halt"
       ],
       "postLaunchCommands": [
-        "monitor rtt setup 0x24000000 0x24080000 \"SEGGER RTT\"",
+        "monitor rtt setup 0x20000000 0x20020000 \"SEGGER RTT\"",
         "monitor rtt start",
         "monitor rtt server start 9090 0"
       ],
       "postRestartCommands": [
         "monitor halt",
-        "monitor rtt setup 0x24000000 0x24080000 \"SEGGER RTT\"",
+        "monitor rtt setup 0x20000000 0x20020000 \"SEGGER RTT\"",
         "monitor rtt start",
         "monitor rtt server start 9090 0"
       ],
@@ -69,13 +69,13 @@
         "monitor reset halt"
       ],
       "postLaunchCommands": [
-        "monitor rtt setup 0x24000000 0x24080000 \"SEGGER RTT\"",
+        "monitor rtt setup 0x20000000 0x20020000 \"SEGGER RTT\"",
         "monitor rtt start",
         "monitor rtt server start 9090 0"
       ],
       "postRestartCommands": [
         "monitor halt",
-        "monitor rtt setup 0x24000000 0x24080000 \"SEGGER RTT\"",
+        "monitor rtt setup 0x20000000 0x20020000 \"SEGGER RTT\"",
         "monitor rtt start",
         "monitor rtt server start 9090 0"
       ],
@@ -105,7 +105,7 @@
       "svdFile": "${workspaceFolder}/STM32H723.svd",
       "showDevDebugOutput": "parsed",
       "postAttachCommands": [
-        "monitor rtt setup 0x24000000 0x24080000 \"SEGGER RTT\"",
+        "monitor rtt setup 0x20000000 0x20020000 \"SEGGER RTT\"",
         "monitor rtt start",
         "monitor rtt server start 9090 0"
       ],

Core/Src/stm32h7xx_it.c

@@ -273,7 +273,22 @@ __attribute__((noreturn, optimize("O0"))) void my_fault_handler_c(sContextStateF
         &metadata_buffer,
         sizeof(metadata_buffer)
     );
-    // reboot the system
+    // In debug builds, stop here instead of forcing a reset loop.
+#ifndef NDEBUG
+    __BKPT(0);
+    while (1) {
+    }
+#else
+    // In debug sessions on release binaries, stop here as well.
+    volatile uint32_t* dhcsr = (volatile uint32_t*)0xE000EDF0;
+    if ((*dhcsr & 0x1U) != 0U) {
+        __BKPT(0);
+        while (1) {
+        }
+    }
+#endif
+
+    // Reboot the system in non-debug runs.
     volatile uint32_t* aircr = (volatile uint32_t*)0xE000ED0C;
     __asm volatile("dsb");
     *aircr = (0x05FA << 16) | 0x1 << 2;
@@ -407,7 +422,19 @@ void FDCAN3_IT0_IRQHandler(void) { HAL_FDCAN_IRQHandler(&hfdcan1); }
  */
 void FDCAN3_IT1_IRQHandler(void) { HAL_FDCAN_IRQHandler(&hfdcan1); }
 
+<<<<<<< refactor/EXTI
 void FMAC_IRQHandler(void) { HAL_FMAC_IRQHandler(&hfmac); }
+=======
+/**
+ * @brief This function handles DMA1 stream0 global interrupt.
+ */
+
+void FMAC_IRQHandler(void) { HAL_FMAC_IRQHandler(&hfmac); }
+
+/**
+ * @brief This function handles SPI3 global interrupt.
+ */
+>>>>>>> main
 
 /**
  * @brief This function handles Ethernet global interrupt.