style: apply clang-format to all modified C++ files

Author: zhangyue

src/ascend/add_rms_norm/kernel.h

@@ -7,8 +7,8 @@
 #include "aclnn/aclnn_base.h"
 #include "aclnn_add.h"
 #include "aclnn_rms_norm.h"
-#include "ascend/common.h"
 #include "ascend/add_rms_norm/registry.h"
+#include "ascend/common.h"
 #include "ascend/workspace_pool_.h"
 #include "operator.h"
 
@@ -63,10 +63,8 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 0> : public AddRmsNorm {
                                &add_exec_);
       aclSetAclOpExecutorRepeatable(add_exec_);
     } else {
-      aclSetInputTensorAddr(add_exec_, 0, t_x1,
-                            const_cast<void*>(x1.data()));
-      aclSetInputTensorAddr(add_exec_, 1, t_x2,
-                            const_cast<void*>(x2.data()));
+      aclSetInputTensorAddr(add_exec_, 0, t_x1, const_cast<void*>(x1.data()));
+      aclSetInputTensorAddr(add_exec_, 1, t_x2, const_cast<void*>(x2.data()));
       aclSetOutputTensorAddr(add_exec_, 0, t_x_out, x_out.data());
     }
     auto& add_arena = ascend::workspacePool().ensure(stream, add_ws_);
@@ -78,18 +76,17 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 0> : public AddRmsNorm {
 
     // Lazily create rstd tensor descriptor on first call.
     if (!rstd_tensor_) {
-      rstd_tensor_ = aclCreateTensor(
-          rstd_shape_.data(), 2, ACL_FLOAT,
-          /*strides=*/nullptr, 0, ACL_FORMAT_ND, rstd_shape_.data(), 2,
-          rstd_arena.buf);
+      rstd_tensor_ = aclCreateTensor(rstd_shape_.data(), 2, ACL_FLOAT,
+                                     /*strides=*/nullptr, 0, ACL_FORMAT_ND,
+                                     rstd_shape_.data(), 2, rstd_arena.buf);
     } else {
       aclSetRawTensorAddr(rstd_tensor_, rstd_arena.buf);
     }
 
     // Step 2: y_out = rms_norm(x_out, gamma, eps).
     if (!norm_exec_) {
-      aclnnRmsNormGetWorkspaceSize(t_x_out, t_gamma, eps, t_y_out,
-                                   rstd_tensor_, &norm_ws_, &norm_exec_);
+      aclnnRmsNormGetWorkspaceSize(t_x_out, t_gamma, eps, t_y_out, rstd_tensor_,
+                                   &norm_ws_, &norm_exec_);
       aclSetAclOpExecutorRepeatable(norm_exec_);
     } else {
       aclSetInputTensorAddr(norm_exec_, 0, t_x_out, x_out.data());

src/ascend/add_rms_norm/kernel_custom.h

@@ -10,22 +10,22 @@
 #include "acl/acl.h"
 #include "aclnn/aclnn_base.h"
 #include "aclnnop/aclnn_cast.h"
-#include "ascend/common.h"
 #include "ascend/add_rms_norm/registry.h"
+#include "ascend/common.h"
 #include "ascend/workspace_pool_.h"
 #include "base/add_rms_norm.h"
 #include "operator.h"
 
 // Forward-declare the generated AscendC kernel launch function.
 // This symbol is provided by the `no_workspace_kernel` static library
-// built from `ascend/custom_kernel/csrc/ops/add_rms_norm/op_kernel/add_rms_norm.cpp`
-// via `ascendc_library()`.
+// built from
+// `ascend/custom_kernel/csrc/ops/add_rms_norm/op_kernel/add_rms_norm.cpp` via
+// `ascendc_library()`.
 extern "C" uint32_t aclrtlaunch_add_rms_norm(
-    uint32_t blockDim, void* stream,
-    void* x1, void* x2, void* weight, void* y, void* x_out,
-    int64_t totalRows, int64_t dimLength, int64_t dimLengthAlign,
-    int64_t formerNum, int64_t formerLength, int64_t tailLength,
-    float eps, int64_t dtypeSize);
+    uint32_t blockDim, void* stream, void* x1, void* x2, void* weight, void* y,
+    void* x_out, int64_t totalRows, int64_t dimLength, int64_t dimLengthAlign,
+    int64_t formerNum, int64_t formerLength, int64_t tailLength, float eps,
+    int64_t dtypeSize);
 
 namespace infini::ops {
 
@@ -62,8 +62,8 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 2> : public AddRmsNorm {
     assert(static_cast<int64_t>(dim_) == dim_length_align_ &&
            "Custom AddRmsNorm kernel requires 32-byte aligned last dimension");
 
-    total_rows_ = static_cast<int64_t>(batch_size_) *
-                  static_cast<int64_t>(nhead_);
+    total_rows_ =
+        static_cast<int64_t>(batch_size_) * static_cast<int64_t>(nhead_);
 
     // For fp16 input, weight needs fp32 conversion because the custom
     // kernel always reads weight as fp32.
@@ -72,16 +72,15 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 2> : public AddRmsNorm {
     if (needs_weight_cast_) {
       // Allocate persistent fp32 weight buffer on device.
       size_t fp32_bytes = static_cast<size_t>(dim_) * sizeof(float);
-      aclrtMalloc(&weight_fp32_data_, fp32_bytes,
-                  ACL_MEM_MALLOC_NORMAL_ONLY);
+      aclrtMalloc(&weight_fp32_data_, fp32_bytes, ACL_MEM_MALLOC_NORMAL_ONLY);
 
       // AclTensorCache for the cast source (fp16 weight descriptor).
-      weight_src_cache_ = ascend::AclTensorCache(
-          {static_cast<int64_t>(dim_)}, ACL_FLOAT16, nullptr);
+      weight_src_cache_ = ascend::AclTensorCache({static_cast<int64_t>(dim_)},
+                                                 ACL_FLOAT16, nullptr);
 
       // AclTensorCache for the cast destination (fp32 weight buffer).
-      weight_dst_cache_ = ascend::AclTensorCache(
-          {static_cast<int64_t>(dim_)}, ACL_FLOAT, weight_fp32_data_);
+      weight_dst_cache_ = ascend::AclTensorCache({static_cast<int64_t>(dim_)},
+                                                 ACL_FLOAT, weight_fp32_data_);
     }
   }
 
@@ -105,8 +104,7 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 2> : public AddRmsNorm {
       const void* cur_weight = gamma.data();
 
       if (cur_weight != last_weight_ptr_) {
-        auto t_src =
-            weight_src_cache_.get(const_cast<void*>(cur_weight));
+        auto t_src = weight_src_cache_.get(const_cast<void*>(cur_weight));
         auto t_dst = weight_dst_cache_.get(weight_fp32_data_);
 
         if (!cast_exec_) {
@@ -133,25 +131,17 @@ class Operator<AddRmsNorm, Device::Type::kAscend, 2> : public AddRmsNorm {
     // Block-level tiling: distribute rows across cores.
     static constexpr int64_t kMaxBlockDim = 40;
     int64_t used_cores = std::min(total_rows_, kMaxBlockDim);
-    int64_t former_length =
-        (total_rows_ + used_cores - 1) / used_cores;
+    int64_t former_length = (total_rows_ + used_cores - 1) / used_cores;
     int64_t tail_length = former_length - 1;
     int64_t former_num = total_rows_ - tail_length * used_cores;
     uint32_t block_dim = static_cast<uint32_t>(used_cores);
 
     // Launch custom AscendC kernel.
     aclrtlaunch_add_rms_norm(
-        block_dim, stream,
-        const_cast<void*>(x1.data()),
-        const_cast<void*>(x2.data()),
-        weight_fp32,
-        y_out.data(),
-        x_out.data(),
-        total_rows_,
-        static_cast<int64_t>(dim_),
-        dim_length_align_,
-        former_num, former_length, tail_length,
-        eps, dtype_size_);
+        block_dim, stream, const_cast<void*>(x1.data()),
+        const_cast<void*>(x2.data()), weight_fp32, y_out.data(), x_out.data(),
+        total_rows_, static_cast<int64_t>(dim_), dim_length_align_, former_num,
+        former_length, tail_length, eps, dtype_size_);
   }
 
  private:

src/ascend/apply_rotary_pos_emb/kernel.h

@@ -49,14 +49,14 @@ class Operator<ApplyRotaryPosEmb, Device::Type::kAscend>
 
     // V2 expects cos/sin as `[T, 1, D]`.  Input is `[T, D]` — same data,
     // different descriptor shape (T*1*D == T*D for contiguous tensors).
-    cos_cache_ = ascend::AclTensorCache(
-        {T, 1, D}, acl_dt, const_cast<void*>(cos.data()));
-    sin_cache_ = ascend::AclTensorCache(
-        {T, 1, D}, acl_dt, const_cast<void*>(sin.data()));
-    q_cache_ = ascend::AclTensorCache(
-        {T, Nq, D}, acl_dt, const_cast<void*>(query_out.data()));
-    k_cache_ = ascend::AclTensorCache(
-        {T, Nkv, D}, acl_dt, const_cast<void*>(key_out.data()));
+    cos_cache_ = ascend::AclTensorCache({T, 1, D}, acl_dt,
+                                        const_cast<void*>(cos.data()));
+    sin_cache_ = ascend::AclTensorCache({T, 1, D}, acl_dt,
+                                        const_cast<void*>(sin.data()));
+    q_cache_ = ascend::AclTensorCache({T, Nq, D}, acl_dt,
+                                      const_cast<void*>(query_out.data()));
+    k_cache_ = ascend::AclTensorCache({T, Nkv, D}, acl_dt,
+                                      const_cast<void*>(key_out.data()));
   }
 
   ~Operator() {
@@ -105,10 +105,8 @@ class Operator<ApplyRotaryPosEmb, Device::Type::kAscend>
     } else {
       aclSetInputTensorAddr(v2_exec_, 0, t_q, query_out.data());
       aclSetInputTensorAddr(v2_exec_, 1, t_k, key_out.data());
-      aclSetInputTensorAddr(v2_exec_, 2, t_cos,
-                            const_cast<void*>(cos.data()));
-      aclSetInputTensorAddr(v2_exec_, 3, t_sin,
-                            const_cast<void*>(sin.data()));
+      aclSetInputTensorAddr(v2_exec_, 2, t_cos, const_cast<void*>(cos.data()));
+      aclSetInputTensorAddr(v2_exec_, 3, t_sin, const_cast<void*>(sin.data()));
     }
 
     auto& arena = ascend::workspacePool().ensure(stream, v2_ws_);

src/ascend/apply_rotary_pos_emb/kernel_atb.h

@@ -98,8 +98,7 @@ class Operator<ApplyRotaryPosEmb, Device::Type::kAscend, 1>
 
     if (query.data() != query_out.data()) {
       aclrtMemcpyAsync(query_out.data(),
-                       static_cast<size_t>(T * hiddenQ) * elem_sz,
-                       query.data(),
+                       static_cast<size_t>(T * hiddenQ) * elem_sz, query.data(),
                        static_cast<size_t>(T * hiddenQ) * elem_sz,
                        ACL_MEMCPY_DEVICE_TO_DEVICE, stream);
     }
@@ -126,9 +125,9 @@ class Operator<ApplyRotaryPosEmb, Device::Type::kAscend, 1>
         cos_sin_shape_, acl_dt_, const_cast<void*>(cos.data()), cs_bytes);
     atb::Tensor t_sin = ascend::toAtbTensor(
         cos_sin_shape_, acl_dt_, const_cast<void*>(sin.data()), cs_bytes);
-    atb::Tensor t_seqlen = ascend::toAtbTensor(
-        seqlen_shape_, ACL_INT32, seqlen_dev_,
-        static_cast<uint64_t>(sizeof(int32_t)));
+    atb::Tensor t_seqlen =
+        ascend::toAtbTensor(seqlen_shape_, ACL_INT32, seqlen_dev_,
+                            static_cast<uint64_t>(sizeof(int32_t)));
 
     atb::VariantPack vp;
     vp.inTensors = {t_q, t_k, t_cos, t_sin, t_seqlen};

src/ascend/atb_common_.h

@@ -9,10 +9,10 @@
 #include <vector>
 
 #include "acl/acl.h"
+#include "ascend/data_type_.h"
 #include "atb/context.h"
 #include "atb/operation.h"
 #include "atb/types.h"
-#include "ascend/data_type_.h"
 #include "tensor.h"
 
 namespace infini::ops::ascend {

src/ascend/causal_softmax/kernel.h

@@ -29,9 +29,7 @@ template <>
 class Operator<CausalSoftmax, Device::Type::kAscend> : public CausalSoftmax {
  public:
   Operator(const Tensor input, Tensor out)
-      : CausalSoftmax(input, out),
-        in_cache_(input),
-        out_cache_(out) {
+      : CausalSoftmax(input, out), in_cache_(input), out_cache_(out) {
     // Compute temp buffer size — allocated lazily from pool in `operator()`.
     size_t n_elems = input.numel();
     size_t elem_bytes = kDataTypeToSize.at(dtype_);

src/ascend/common.h

@@ -73,8 +73,8 @@ class AclTensorCache {
  public:
   AclTensorCache() = default;
 
-  // Construct from explicit metadata (for device buffers not wrapped in Tensor).
-  // Computes contiguous strides from shape.
+  // Construct from explicit metadata (for device buffers not wrapped in
+  // Tensor). Computes contiguous strides from shape.
   AclTensorCache(std::vector<int64_t> shape, aclDataType dtype, void* data)
       : shape_(std::move(shape)), dtype_(dtype) {
     strides_.resize(shape_.size());

src/ascend/paged_attention/kernel_atb.h

@@ -10,13 +10,13 @@
 #include <vector>
 
 #include "acl/acl.h"
+#include "ascend/atb_common_.h"
+#include "ascend/paged_attention/registry.h"
+#include "ascend/workspace_pool_.h"
 #include "atb/context.h"
 #include "atb/infer_op_params.h"
 #include "atb/operation.h"
 #include "atb/types.h"
-#include "ascend/atb_common_.h"
-#include "ascend/paged_attention/registry.h"
-#include "ascend/workspace_pool_.h"
 #include "base/paged_attention.h"
 #include "operator.h"
 
@@ -47,10 +47,10 @@ template <>
 class Operator<PagedAttention, Device::Type::kAscend, 0>
     : public PagedAttention {
  public:
-  Operator(const Tensor query, const Tensor key_cache,
-           const Tensor value_cache, const Tensor seq_lens,
-           const Tensor block_table, int64_t num_heads, int64_t num_kv_heads,
-           int64_t head_size, double scale, int64_t block_size, Tensor output,
+  Operator(const Tensor query, const Tensor key_cache, const Tensor value_cache,
+           const Tensor seq_lens, const Tensor block_table, int64_t num_heads,
+           int64_t num_kv_heads, int64_t head_size, double scale,
+           int64_t block_size, Tensor output,
            std::optional<Tensor> seq_lens_host = std::nullopt,
            std::optional<Tensor> block_table_host = std::nullopt)
       : PagedAttention(query, key_cache, value_cache, seq_lens, block_table,
@@ -110,8 +110,7 @@ class Operator<PagedAttention, Device::Type::kAscend, 0>
     param.qkScale = static_cast<float>(scale_);
 
     atb::Status s = atb::CreateOperation(param, &op_);
-    assert(s == atb::NO_ERROR &&
-           "atb::CreateOperation(PagedAttention) failed");
+    assert(s == atb::NO_ERROR && "atb::CreateOperation(PagedAttention) failed");
   }
 
   ~Operator() {
@@ -150,24 +149,23 @@ class Operator<PagedAttention, Device::Type::kAscend, 0>
     if (block_table_host.has_value()) {
       bt_host_ptr = const_cast<void*>(block_table_host.value().data());
     } else {
-      aclrtMemcpy(bt_host_, bt_host_bytes_, block_table.data(),
-                  bt_host_bytes_, ACL_MEMCPY_DEVICE_TO_HOST);
+      aclrtMemcpy(bt_host_, bt_host_bytes_, block_table.data(), bt_host_bytes_,
+                  ACL_MEMCPY_DEVICE_TO_HOST);
     }
 
     if (seq_lens_host.has_value()) {
       sl_host_ptr = const_cast<void*>(seq_lens_host.value().data());
     } else {
-      aclrtMemcpy(sl_host_, sl_host_bytes_, seq_lens.data(),
-                  sl_host_bytes_, ACL_MEMCPY_DEVICE_TO_HOST);
+      aclrtMemcpy(sl_host_, sl_host_bytes_, seq_lens.data(), sl_host_bytes_,
+                  ACL_MEMCPY_DEVICE_TO_HOST);
     }
 
     atb::VariantPack vp = buildVariantPack(
-        const_cast<void*>(query.data()),
-        const_cast<void*>(key_cache.data()),
+        const_cast<void*>(query.data()), const_cast<void*>(key_cache.data()),
         const_cast<void*>(value_cache.data()),
         const_cast<void*>(block_table.data()),
-        const_cast<void*>(seq_lens.data()), output.data(),
-        bt_host_ptr, sl_host_ptr);
+        const_cast<void*>(seq_lens.data()), output.data(), bt_host_ptr,
+        sl_host_ptr);
 
     // Setup computes workspace requirements and binds tensor descriptors.
     uint64_t ws_size = 0;
@@ -197,9 +195,8 @@ class Operator<PagedAttention, Device::Type::kAscend, 0>
   // `aclIntArray*` parameters.
   atb::VariantPack buildVariantPack(void* query_data, void* key_cache_data,
                                     void* value_cache_data,
-                                    void* block_table_data,
-                                    void* seq_lens_data, void* output_data,
-                                    void* bt_host_ptr,
+                                    void* block_table_data, void* seq_lens_data,
+                                    void* output_data, void* bt_host_ptr,
                                     void* sl_host_ptr) const {
     int64_t B = query_tnd_shape_[0];
     int64_t N = query_tnd_shape_[1];
@@ -214,12 +211,11 @@ class Operator<PagedAttention, Device::Type::kAscend, 0>
     int64_t nb = kv_cache_shape_[0];
     int64_t bs = kv_cache_shape_[1];
     int64_t Nkv = kv_cache_shape_[2];
-    uint64_t kv_bytes =
-        static_cast<uint64_t>(nb * bs * Nkv * D) * elem_size_;
-    atb::Tensor t_key_cache = ascend::toAtbTensor(kv_cache_shape_, acl_dt_,
-                                                  key_cache_data, kv_bytes);
-    atb::Tensor t_value_cache = ascend::toAtbTensor(
-        kv_cache_shape_, acl_dt_, value_cache_data, kv_bytes);
+    uint64_t kv_bytes = static_cast<uint64_t>(nb * bs * Nkv * D) * elem_size_;
+    atb::Tensor t_key_cache =
+        ascend::toAtbTensor(kv_cache_shape_, acl_dt_, key_cache_data, kv_bytes);
+    atb::Tensor t_value_cache = ascend::toAtbTensor(kv_cache_shape_, acl_dt_,
+                                                    value_cache_data, kv_bytes);
 
     // Block table [B, max_blocks] — with hostData for `aclIntArray*`.
     atb::Tensor t_block_table = ascend::toAtbTensor(

src/ascend/reshape_and_cache/kernel.h

@@ -46,8 +46,8 @@ class Operator<ReshapeAndCache, Device::Type::kAscend>
 
     // Flattened K cache view: [total_slots, num_kv_heads, head_size].
     // K cache is kv_cache_out[0], starting at offset 0.
-    kv_k_cache_ = ascend::AclTensorCache(
-        {total_slots, nkv, hs}, acl_dt, kv_cache_out.data());
+    kv_k_cache_ = ascend::AclTensorCache({total_slots, nkv, hs}, acl_dt,
+                                         kv_cache_out.data());
 
     // V cache is kv_cache_out[1], offset by stride(0) elements.
     v_offset_bytes_ = static_cast<size_t>(kv_cache_out.stride(0)) *
@@ -63,8 +63,7 @@ class Operator<ReshapeAndCache, Device::Type::kAscend>
     auto stream = static_cast<aclrtStream>(stream_);
 
     void* kv_k_data = kv_cache_out.data();
-    void* kv_v_data =
-        static_cast<char*>(kv_cache_out.data()) + v_offset_bytes_;
+    void* kv_v_data = static_cast<char*>(kv_cache_out.data()) + v_offset_bytes_;
 
     auto t_kv_k = kv_k_cache_.get(kv_k_data);
     auto t_kv_v = kv_v_cache_.get(kv_v_data);
@@ -78,16 +77,16 @@ class Operator<ReshapeAndCache, Device::Type::kAscend>
     // reuse via aclSetInputTensorAddr does not update the output reference.
     uint64_t k_ws = 0;
     aclOpExecutor* k_exec = nullptr;
-    aclnnInplaceIndexCopyGetWorkspaceSize(t_kv_k, 0, t_slot, t_key,
-                                          &k_ws, &k_exec);
+    aclnnInplaceIndexCopyGetWorkspaceSize(t_kv_k, 0, t_slot, t_key, &k_ws,
+                                          &k_exec);
     auto& k_arena = ascend::workspacePool().ensure(stream, k_ws);
     aclnnInplaceIndexCopy(k_arena.buf, k_ws, k_exec, stream);
 
     // V cache scatter: kv_v[slot_mapping[i]] = value[i] along dim 0.
     uint64_t v_ws = 0;
     aclOpExecutor* v_exec = nullptr;
-    aclnnInplaceIndexCopyGetWorkspaceSize(t_kv_v, 0, t_slot, t_value,
-                                          &v_ws, &v_exec);
+    aclnnInplaceIndexCopyGetWorkspaceSize(t_kv_v, 0, t_slot, t_value, &v_ws,
+                                          &v_exec);
     auto& v_arena = ascend::workspacePool().ensure(stream, v_ws);
     aclnnInplaceIndexCopy(v_arena.buf, v_ws, v_exec, stream);
   }