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Use relaxed memory order
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dpctl/tensor/libtensor/include/utils/sycl_utils.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ T custom_inclusive_scan_over_group(GroupT &&wg,
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// The w/s adds SYCL atomic fence, since the explicit memory fence
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// prevents reordering/elimination, while it will add slight overhead.
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T __scan_val = identity;
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sycl::atomic_fence(sycl::memory_order::seq_cst,
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sycl::atomic_fence(sycl::memory_order::relaxed,
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sycl::memory_scope::work_item);
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if (in_bounds) {
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__scan_val = local_mem_acc[(offset + lane_id) * max_sgSize - 1];

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