Improve iOS graphics and ARM64 EE timing

Author: jpolo1224

app/src/main/cpp/ios_main.mm

@@ -4255,7 +4255,7 @@ - (BOOL)application:(UIApplication *)application didFinishLaunchingWithOptions:(
 #endif
     fprintf(stderr, "@@BUILD_ID@@ ARMSX2_iOS v%s %s %s %s\n",
         ARMSX2_VERSION_STR, ARMSX2_GIT_HASH, __DATE__, __TIME__);
-    fprintf(stderr, "@@TEST_MARKER@@ armsx2_ios_28_ff_presentcap60_v1\n");
+    fprintf(stderr, "@@TEST_MARKER@@ armsx2_ios_30_mac_ee_timing_sonic_v1\n");
     fprintf(stderr, "@@FF_FIX@@ offspeed_present_skip=1 present_cap60=1 adaptive_backoff=1 drawable_wait_probe=1 vm_pace_probe=1 turbo_only_toggle=1\n");
     fprintf(stderr, "@@DIAG_MODE@@ ee_hotpath=%d\n", ARMSX2_ENABLE_EE_HOTPATH_DIAGNOSTICS);
 

app/src/main/cpp/pcsx2/Counters.cpp

@@ -3,6 +3,8 @@
 
 #include <time.h>
 #include <cmath>
+#include <cstdio>
+#include <string>
 
 #include "Common.h"
 #include "R3000A.h"
@@ -21,6 +23,10 @@
 #include "VMManager.h"
 #include "VUmicro.h"
 
+#if defined(__APPLE__)
+#include <TargetConditionals.h>
+#endif
+
 static const uint EECNT_FUTURE_TARGET = 0x10000000;
 
 uint g_FrameCount = 0;
@@ -479,8 +485,22 @@ static __fi void DoFMVSwitch()
 	if (EmuConfig.Gamefixes.SoftwareRendererFMVHack && EmuConfig.GS.UseHardwareRenderer())
 	{
 		DevCon.Warning("FMV Switch");
+#if defined(__APPLE__) && TARGET_OS_IPHONE
+		const std::string serial = VMManager::GetDiscSerial();
+		std::fprintf(stderr,
+			"@@IOS_FMV_SWITCH_BEGIN@@ serial=\"%s\" state=%d renderer=%d interlace=%d hw=1\n",
+			serial.c_str(), new_fmv_state ? 1 : 0, static_cast<int>(EmuConfig.GS.Renderer),
+			static_cast<int>(EmuConfig.GS.InterlaceMode));
+		std::fflush(stderr);
+#endif
 		// we don't use the sw toggle here, because it'll change back to auto if set to sw
 		MTGS::SetSoftwareRendering(new_fmv_state, new_fmv_state ? GSInterlaceMode::AdaptiveTFF : EmuConfig.GS.InterlaceMode, false);
+#if defined(__APPLE__) && TARGET_OS_IPHONE
+		std::fprintf(stderr,
+			"@@IOS_FMV_SWITCH_END@@ serial=\"%s\" state=%d\n",
+			serial.c_str(), new_fmv_state ? 1 : 0);
+		std::fflush(stderr);
+#endif
 	}
 }
 

app/src/main/cpp/pcsx2/GameDatabase.cpp

@@ -465,6 +465,11 @@ static bool IsIOSBlackGame(const std::string& name)
 	return name == "Black";
 }
 
+static bool IsIOSSonicUnleashedGame(const std::string& name)
+{
+	return name == "Sonic Unleashed";
+}
+
 // Midnight Club 3 (DUB Edition + DUB Edition Remix). Its GameDB entry uses the
 // GSC_MidnightClub3 skip-count callback to drop broken bloom draws. The callback
 // only ever *skips* draws (no extra barriers or copies), which makes it one of
@@ -601,7 +606,9 @@ static bool IsIOSMetalAllowedAutoGSHWCallback(const GameDatabaseSchema::GameEntr
 		case GameDatabaseSchema::GSHWFixId::BeforeDraw:
 		{
 			static const s16 burnout_games = GSLookupBeforeDrawFunctionId("OI_BurnoutGames");
-			return (IsIOSBurnoutMetalCallbackGame(entry.name) || IsIOSBlackGame(entry.name)) && value == burnout_games;
+			static const s16 sonic_unleashed = GSLookupBeforeDrawFunctionId("OI_SonicUnleashed");
+			return ((IsIOSBurnoutMetalCallbackGame(entry.name) || IsIOSBlackGame(entry.name)) && value == burnout_games) ||
+				(IsIOSSonicUnleashedGame(entry.name) && value == sonic_unleashed);
 		}
 
 		default:
@@ -629,7 +636,9 @@ static bool IsIOSMetalAllowedCompatLabOffGSHWFix(const GameDatabaseSchema::GameE
 		case GameDatabaseSchema::GSHWFixId::BeforeDraw:
 		{
 			static const s16 burnout_games = GSLookupBeforeDrawFunctionId("OI_BurnoutGames");
-			return (IsIOSBurnoutMetalCallbackGame(entry.name) || IsIOSBlackGame(entry.name)) && value == burnout_games;
+			static const s16 sonic_unleashed = GSLookupBeforeDrawFunctionId("OI_SonicUnleashed");
+			return ((IsIOSBurnoutMetalCallbackGame(entry.name) || IsIOSBlackGame(entry.name)) && value == burnout_games) ||
+				(IsIOSSonicUnleashedGame(entry.name) && value == sonic_unleashed);
 		}
 
 		default:

app/src/main/cpp/pcsx2/arm64/aR5900.cpp

@@ -3111,6 +3111,26 @@ static u32 recScaleBlockCycles(u32 raw)
 	return (scale_cycles < 1) ? 1 : scale_cycles;
 }
 
+// True for ops that run the interpreter inline AND need a live, current cpuRegs.cycle.
+// COP2 / VU0-macro ops (opcode 0x12, excluding BC2 branches) sync VU state from
+// cpuRegs.cycle, so commit the block's accumulated cycles before executing them.
+static bool recOpNeedsCycleFlush(u32 op)
+{
+	return (op >> 26) == 0x12 && ((op >> 21) & 0x1f) != 0x08;
+}
+
+// Emit: cpuRegs.cycle += recScaleBlockCycles(raw). Used mid-block before inline
+// COP2/VU0-macro interpreter calls so they observe current EE time.
+static void recEmitFlushCycles(u32 raw)
+{
+	if (raw == 0)
+		return;
+
+	armAsm->Ldr(RSCRATCHADDR, a64::MemOperand(RESTATEPTR, EE_CYCLE_OFFSET));
+	armAsm->Add(RSCRATCHADDR, RSCRATCHADDR, recScaleBlockCycles(raw));
+	armAsm->Str(RSCRATCHADDR, a64::MemOperand(RESTATEPTR, EE_CYCLE_OFFSET));
+}
+
 // Install a freshly-compiled block's self-modifying-code protection and return the pointer
 // to record in its recLUT slot. Direct port of x86 memory_protect_recompiled_code
 // (iR5900.cpp), adapted to this port's body-first layout: the caller has already emitted
@@ -3463,6 +3483,10 @@ static void recRecompile(u32 startpc)
 	u32 pc = startpc;
 	u32 endpc = startpc;
 	u32 raw_cycles = 0;
+	const u32 ee_cycle_mult = 2 - ((cpuRegs.CP0.n.Config >> 18) & 0x1);
+	const auto eeOpCycles = [ee_cycle_mult](u32 opc) -> u32 {
+		return (opc == 0 ? 9u : static_cast<u32>(R5900::GetInstruction(opc).cycles)) * ee_cycle_mult;
+	};
 	u32 compiled = 0;
 	bool interp_step = false;
 	bool known_dispatch_pc = false;
@@ -3491,12 +3515,11 @@ static void recRecompile(u32 startpc)
 		}
 
 		const u32 op = memRead32(pc);
-		const R5900::OPCODE& info = R5900::GetInstruction(op);
 
 		if (recIsHandledBranch(op))
 		{
 			// Terminate the block: branch generator + delay slot + dispatch tail.
-			raw_cycles += info.cycles;
+			raw_cycles += eeOpCycles(op);
 			branch_tail = true;
 			tail_reason = "branch";
 			known_dispatch_pc = recGetKnownBranchTarget(op, pc, const_state, &dispatch_pc);
@@ -3506,7 +3529,7 @@ static void recRecompile(u32 startpc)
 			recConstApplyBranchLink(op, pc, const_state);
 
 			const u32 delay_op = memRead32(pc + 4);
-			raw_cycles += R5900::GetInstruction(delay_op).cycles;
+			raw_cycles += eeOpCycles(delay_op);
 			recEmitOp(delay_op, const_state, cache_state); // delay slot — must not write cpuRegs.pc
 			endpc = pc + 8;
 
@@ -3543,7 +3566,7 @@ static void recRecompile(u32 startpc)
 			// test + PC select, then jump over the delay-slot code when not taken.
 			// The cache/const state diverges across the two paths, so it is flushed
 			// and discarded inside the taken path before the skip label.
-			raw_cycles += info.cycles;
+			raw_cycles += eeOpCycles(op);
 			branch_tail = true;
 			tail_reason = "branch_likely";
 
@@ -3558,7 +3581,7 @@ static void recRecompile(u32 startpc)
 			armAsm->B(&skip_delay, a64::InvertCondition(taken));
 
 			const u32 delay_op = memRead32(pc + 4);
-			raw_cycles += R5900::GetInstruction(delay_op).cycles;
+			raw_cycles += eeOpCycles(delay_op);
 			recEmitOp(delay_op, const_state, cache_state);
 			recCacheFlushAll(cache_state);
 			recCacheKillAll(cache_state);
@@ -3572,6 +3595,14 @@ static void recRecompile(u32 startpc)
 			break;
 		}
 
+		const bool needs_cycle_flush = recOpNeedsCycleFlush(op);
+		if (needs_cycle_flush)
+		{
+			raw_cycles += eeOpCycles(op);
+			recEmitFlushCycles(raw_cycles);
+			raw_cycles = 0;
+		}
+
 		// Straight-line op we can codegen? (Generators decode from `op` directly;
 		// they never read cpuRegs.code, so nothing to set here at compile time.)
 		if (recTranslateOpOptimized(op, const_state, cache_state))
@@ -3582,7 +3613,8 @@ static void recRecompile(u32 startpc)
 			else
 				waitloop_possible = false;
 
-			raw_cycles += info.cycles;
+			if (!needs_cycle_flush)
+				raw_cycles += eeOpCycles(op);
 			pc += 4;
 			endpc = pc;
 			if (++compiled >= MAX_BLOCK_INSTS)