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Rollup merge of rust-lang#155763 - cezarbbb:promote-thumb-to-tier2, r=petrochenkov
Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985
2 parents 53509ca + e3468ae commit 33165e8

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‎compiler/rustc_target/src/spec/targets/thumbv7a_none_eabi.rs‎

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@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7a-none-eabi".into(),
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metadata: TargetMetadata {
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description: Some("Thumb-mode Bare Armv7-A".into()),
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tier: Some(3),
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tier: Some(2),
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host_tools: Some(false),
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std: Some(false),
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},

‎compiler/rustc_target/src/spec/targets/thumbv7a_none_eabihf.rs‎

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@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7a-none-eabihf".into(),
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metadata: TargetMetadata {
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description: Some("Thumb-mode Bare Armv7-A, hardfloat".into()),
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tier: Some(3),
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tier: Some(2),
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host_tools: Some(false),
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std: Some(false),
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},

‎compiler/rustc_target/src/spec/targets/thumbv7r_none_eabi.rs‎

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@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7r-none-eabi".into(),
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metadata: TargetMetadata {
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description: Some("Thumb-mode Bare Armv7-R".into()),
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tier: Some(3),
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tier: Some(2),
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host_tools: Some(false),
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std: Some(false),
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},

‎compiler/rustc_target/src/spec/targets/thumbv7r_none_eabihf.rs‎

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@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv7r-none-eabihf".into(),
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metadata: TargetMetadata {
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description: Some("Thumb-mode Bare Armv7-R, hardfloat".into()),
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tier: Some(3),
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tier: Some(2),
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host_tools: Some(false),
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std: Some(false),
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},

‎compiler/rustc_target/src/spec/targets/thumbv8r_none_eabihf.rs‎

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@@ -7,7 +7,7 @@ pub(crate) fn target() -> Target {
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llvm_target: "thumbv8r-none-eabihf".into(),
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metadata: TargetMetadata {
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description: Some("Thumb-mode Bare Armv8-R, hardfloat".into()),
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tier: Some(3),
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tier: Some(2),
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host_tools: Some(false),
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std: Some(false),
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},

‎src/ci/docker/host-x86_64/dist-various-1/Dockerfile‎

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@@ -114,11 +114,16 @@ ENV TARGETS=$TARGETS,riscv32imafc-unknown-none-elf
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ENV TARGETS=$TARGETS,riscv64imac-unknown-none-elf
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ENV TARGETS=$TARGETS,riscv64gc-unknown-none-elf
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ENV TARGETS=$TARGETS,armv7r-none-eabi
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ENV TARGETS=$TARGETS,thumbv7r-none-eabi
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ENV TARGETS=$TARGETS,armv7r-none-eabihf
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ENV TARGETS=$TARGETS,thumbv7r-none-eabihf
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ENV TARGETS=$TARGETS,armv8r-none-eabihf
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ENV TARGETS=$TARGETS,thumbv8r-none-eabihf
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ENV TARGETS=$TARGETS,thumbv7neon-unknown-linux-gnueabihf
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ENV TARGETS=$TARGETS,armv7a-none-eabi
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ENV TARGETS=$TARGETS,thumbv7a-none-eabi
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ENV TARGETS=$TARGETS,armv7a-none-eabihf
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ENV TARGETS=$TARGETS,thumbv7a-none-eabihf
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ENV CFLAGS_armv5te_unknown_linux_musleabi="-march=armv5te -marm -mfloat-abi=soft" \
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CFLAGS_arm_unknown_linux_musleabi="-march=armv6 -marm" \
@@ -133,8 +138,18 @@ ENV CFLAGS_armv5te_unknown_linux_musleabi="-march=armv5te -marm -mfloat-abi=soft
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CC_armv7a_none_eabihf=arm-none-eabi-gcc \
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CFLAGS_armv7a_none_eabi=-march=armv7-a \
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CFLAGS_armv7a_none_eabihf=-march=armv7-a+fp \
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CC_thumbv7a_none_eabi=arm-none-eabi-gcc \
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CC_thumbv7a_none_eabihf=arm-none-eabi-gcc \
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CFLAGS_thumbv7a_none_eabi=-march=armv7-a \
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CFLAGS_thumbv7a_none_eabihf="-march=armv7-a+fp -mfpu=vfpv3-d16" \
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CC_thumbv7r_none_eabi=arm-none-eabi-gcc \
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CC_thumbv7r_none_eabihf=arm-none-eabi-gcc \
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CFLAGS_thumbv7r_none_eabi=-march=armv7-r \
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CFLAGS_thumbv7r_none_eabihf="-march=armv7-r+fp -mfpu=vfpv3-d16" \
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CC_armv8r_none_eabihf=arm-none-eabi-gcc \
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CFLAGS_armv8r_none_eabihf="-march=armv8-r+fp.sp -mfpu=fp-armv8" \
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CC_thumbv8r_none_eabihf=arm-none-eabi-gcc \
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CFLAGS_thumbv8r_none_eabihf="-march=armv8-r+fp.sp -mfpu=fp-armv8" \
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CC_aarch64_unknown_none_softfloat=aarch64-none-elf-gcc \
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CFLAGS_aarch64_unknown_none_softfloat=-mstrict-align -march=armv8-a+nofp+nosimd \
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CC_aarch64_unknown_none=aarch64-none-elf-gcc \

‎src/doc/rustc/src/platform-support.md‎

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[`armv7r-none-eabi`](platform-support/armv7r-none-eabi.md) | * | Bare Armv7-R
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[`armv7r-none-eabihf`](platform-support/armv7r-none-eabi.md) | * | Bare Armv7-R, hardfloat
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[`armv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | Bare Armv8-R, hardfloat
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[`thumbv7a-none-eabi`](platform-support/armv7a-none-eabi.md) | * | Thumb-mode Bare Armv7-A
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[`thumbv7a-none-eabihf`](platform-support/armv7a-none-eabi.md) | * | Thumb-mode Bare Armv7-A, hardfloat
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[`thumbv7r-none-eabi`](platform-support/armv7r-none-eabi.md) | * | Thumb-mode Bare Armv7-R
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[`thumbv7r-none-eabihf`](platform-support/armv7r-none-eabi.md) | * | Thumb-mode Bare Armv7-R, hardfloat
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[`thumbv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | Thumb-mode Bare Armv8-R, hardfloat
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`i586-unknown-linux-gnu` | ✓ | 32-bit Linux (kernel 3.2+, glibc 2.17, original Pentium) [^x86_32-floats-x87]
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`i586-unknown-linux-musl` | ✓ | 32-bit Linux (musl 1.2.5, original Pentium) [^x86_32-floats-x87]
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[`i686-linux-android`](platform-support/android.md) | ✓ | 32-bit x86 Android ([Pentium 4 plus various extensions](https://developer.android.com/ndk/guides/abis.html#x86)) [^x86_32-floats-return-ABI]
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[`thumbv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | Thumb-mode Bare Armv5TE
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[`thumbv6-none-eabi`](platform-support/armv6-none-eabi.md) | * | | Thumb-mode Bare Armv6
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[`thumbv6m-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv6M with NuttX
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[`thumbv7a-none-eabi`](platform-support/armv7a-none-eabi.md) | * | | Thumb-mode Bare Armv7-A
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[`thumbv7a-none-eabihf`](platform-support/armv7a-none-eabi.md) | * | | Thumb-mode Bare Armv7-A, hardfloat
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[`thumbv7a-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX
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[`thumbv7a-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX, hardfloat
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`thumbv7a-pc-windows-msvc` | | |
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[`thumbv7em-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7EM with NuttX, hardfloat
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[`thumbv7m-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7M with NuttX
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`thumbv7neon-unknown-linux-musleabihf` | ? | | Thumb2-mode Armv7-A Linux with NEON, musl 1.2.5
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[`thumbv7r-none-eabi`](platform-support/armv7r-none-eabi.md) | * | | Thumb-mode Bare Armv7-R
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[`thumbv7r-none-eabihf`](platform-support/armv7r-none-eabi.md) | * | | Thumb-mode Bare Armv7-R, hardfloat
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[`thumbv8m.base-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv8M Baseline with NuttX
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[`thumbv8m.main-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv8M Mainline with NuttX
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[`thumbv8m.main-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv8M Mainline with NuttX, hardfloat
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[`thumbv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | | Thumb-mode Bare Armv8-R, hardfloat
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[`wasm64-unknown-unknown`](platform-support/wasm64-unknown-unknown.md) | ? | | WebAssembly
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[`wasm32-wali-linux-musl`](platform-support/wasm32-wali-linux.md) | ? | | WebAssembly with [WALI](https://github.com/arjunr2/WALI)
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[`wasm32-wasip3`](platform-support/wasm32-wasip3.md) | ✓ | | WebAssembly with WASIp3

‎src/doc/rustc/src/platform-support/arm-none-eabi.md‎

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- Arm A-Profile Architectures
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- [`armv7a-none-eabi`](armv7a-none-eabi.md)
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- [`thumbv7a-none-eabi` and `thumbv7a-none-eabihf`](armv7a-none-eabi.md)
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- Arm R-Profile Architectures
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- [`armv7r-none-eabi` and `armv7r-none-eabihf`](armv7r-none-eabi.md)
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- [`armebv7r-none-eabi` and `armebv7r-none-eabihf`](armebv7r-none-eabi.md)
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- [`armv8r-none-eabihf`](armv8r-none-eabihf.md)
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- [`thumbv7r-none-eabi` and `thumbv7r-none-eabihf`](armv7r-none-eabi.md)
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- [`thumbv8r-none-eabihf`](armv8r-none-eabihf.md)
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- Arm M-Profile Architectures
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- [`thumbv6m-none-eabi`](thumbv6m-none-eabi.md)
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- [`thumbv7m-none-eabi`](thumbv7m-none-eabi.md)

‎src/doc/rustc/src/platform-support/armv7a-none-eabi.md‎

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# `armv7a-none-eabi*` and `thumbv7a-none-eabi*`
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* **Tier: 2** (`armv7a-none-eabi` and `armv7a-none-eabihf`)
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* **Tier: 3** (`thumbv7a-none-eabi` and `thumbv7a-none-eabihf`)
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* **Tier: 2**
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* **Library Support:** core and alloc (bare-metal, `#![no_std]`)
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Bare-metal target for CPUs in the Armv7-A architecture family, supporting dual

‎src/doc/rustc/src/platform-support/armv7r-none-eabi.md‎

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# `armv7r-none-eabi*` and `thumbv7r-none-eabi*`
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* **Tier: 2** (`armv7r-none-eabi` and `armv7r-none-eabihf`)
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* **Tier: 3** (`thumbv7r-none-eabi` and `thumbv7r-none-eabihf`)
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* **Tier: 2**
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* **Library Support:** core and alloc (bare-metal, `#![no_std]`)
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Bare-metal target for CPUs in the Armv7-R architecture family, supporting dual

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