@@ -92,25 +92,17 @@ julia --project=examples examples/benchmarks.jl # Julia
9292uv run python examples/benchmarks.py # Python (for comparison)
9393```
9494
95- Benchmarks comparing cuTile.jl against cuTile Python on an RTX 5080 (20 runs, 5 warmup ,
96- min time reported):
95+ Benchmarks comparing cuTile.jl against cuTile Python on an RTX 5080 (` tileiras ` 13.2.51 ,
96+ 20 runs, 5 warmup, min time reported):
9797
9898| Kernel | Size | Julia | Python | Status |
9999| --------| ------| -------| --------| --------|
100- | Vector Addition | 2^27 f32 | 841 GB/s | 847 GB/s | OK (=) |
101- | Matrix Transpose | 8192² f32 | 773 GB/s | 817 GB/s | -5% |
102- | Layer Normalization | 4096² f32 fwd | 615 GB/s | 761 GB/s | -19% |
103- | Matrix Multiplication | 4096³ f32 | 47.6 TFLOPS | 50.2 TFLOPS | -5% |
104- | Batch Matrix Multiply | 1024×512×2048 ×8 f32 | 28.7 TFLOPS | 40.0 TFLOPS | -28% |
105- | FFT (3-stage Cooley-Tukey) | 512-pt ×64 c64 | 465 μs | 486 μs | OK (+4%) |
106-
107- With the same tileiras, all kernels compile to identical register counts, block sizes, and
108- occupancy. The remaining gap is from ** 1→0 indexing overhead** : Julia's 1-based ` bid() ` and
109- load indices generate extra ` subi ` ops in the Tile IR that perturb tileiras's SASS
110- instruction scheduling (e.g. missing ` .reuse ` operand collector flags on HMMA, different
111- address computation instruction selection). This affects all kernels proportional to loop
112- count (layernorm 174 vs 128 IR lines across 3 loops; batchmatmul L1 hit 9.5% vs 41.3%
113- from cascading scheduling differences).
100+ | Vector Addition | 2^27 f32 | 841 GB/s | 845 GB/s | OK (=) |
101+ | Matrix Transpose | 8192² f32 | 805 GB/s | 811 GB/s | OK (-1%) |
102+ | Layer Normalization | 4096² f32 fwd | 652 GB/s | 720 GB/s | -9% |
103+ | Matrix Multiplication | 4096³ f32 | 43.4 TFLOPS | 43.5 TFLOPS | OK (=) |
104+ | Batch Matrix Multiply | 1024×512×2048 ×8 f32 | 30.5 TFLOPS | 30.9 TFLOPS | OK (-1%) |
105+ | FFT (3-stage Cooley-Tukey) | 1024-pt ×64 c64 | 3280 μs | 3131 μs | -5% |
114106
115107
116108## Supported Operations
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