Restricted numeric types inherit fallback arithmetic methods

[AntonOresten]

Noticed broadcasting operations over narrow precision tiles will inherit any generic upstream methods with implicit up-casting to Float32 at e.g.:

https://github.com/chengchingwen/DLFP8Types.jl/blob/dcd9135cbe44cef45394a9c5cb6417a91beab7b9/src/DLFP8Types.jl#L162-L166

Going against the notion of the narrow precision types being restricted, non-arithmetic, numeric-only types, like TFloat32 (which doesn't have such methods). DLFP8TypesExt and MicrofloatsExt could register FP8/FP4 as restricted

cuTile.jl/src/language/types.jl

Lines 446 to 461 in 69bcd7e

	"""
	Restricted floats — types whose op coverage is intentionally limited
	(no general arithmetic, reductions, scans, …). Currently `TFloat32`;
	future FP8/FP4 dtypes will join this union. Mirrors cuTile Python's
	`NumericDTypeCategories.RestrictedFloat`.
	"""
	const RestrictedFloat = Union{TFloat32}
	"""
	is_restricted_float(::Type) -> Bool
	True if `T` is a restricted float. Used by `reduce` / `scan` (and other
	arithmetic-requiring ops) to reject unsupported element types early
	with a clear error rather than letting tileiras fail downstream.
	"""
	@inline is_restricted_float(::Type{T}) where {T} = T <: RestrictedFloat

and then we can have broadcasting honor it to explicitly disallow this implicit up-casting.

[AntonOresten]

One option is removing arithmetic upstream and making them restricted types there too, but in Microfloats, low-precision arithmetic might be interesting to some.

[AntonOresten]

Interestingly, the PTX ISA 9.4 adds add, sum, mul, and fma for packed narrow precision types:

https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html#alternate-floating-point-instructions

but only for sm_100a and sm_103a