From 78bd52bc4bb103033d72898082b09662c47ba0a5 Mon Sep 17 00:00:00 2001 From: Viral Shah Date: Mon, 22 Jun 2026 18:53:23 -0400 Subject: [PATCH 1/2] riscv: allow single-precision float ABI (lp64f / ilp32f) The header rejected __riscv_float_abi_single with an #error, but the F and D extensions share the same FCSR. The hard-float inline implementations below the guard use only csrr/csrw/csrc on fcsr and fflags, both of which are present whenever F is present. So lp64f / ilp32f can use the same code path as the double ABI. Closes #262. Co-Authored-By: Claude Opus 4.8 (1M context) --- include/openlibm_fenv_riscv.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/openlibm_fenv_riscv.h b/include/openlibm_fenv_riscv.h index aba4715c..b493c0e1 100644 --- a/include/openlibm_fenv_riscv.h +++ b/include/openlibm_fenv_riscv.h @@ -74,13 +74,10 @@ __BEGIN_DECLS extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) -#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double) -#if defined(__riscv_float_abi_single) -#error single precision floating point ABI not supported -#else +#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double) && \ + !defined(__riscv_float_abi_single) #error compiler did not set soft/hard float macros #endif -#endif #ifndef __riscv_float_abi_soft #define __rfs(__fcsr) __asm __volatile("csrr %0, fcsr" : "=r" (__fcsr)) From ef48409fea5b02d29bc18b3f619f448692f8b5f6 Mon Sep 17 00:00:00 2001 From: "Viral B. Shah" Date: Mon, 22 Jun 2026 23:15:38 +0000 Subject: [PATCH 2/2] add CI coverage for the RISC-V single-float ABI (#262) The lp64f / ilp32f ABI used to be rejected by openlibm_fenv_riscv.h with an #error. Add a compile-only cross job that rebuilds the static library with -mabi=lp64f so the removed #error stays removed. A full lp64f shared-lib link or qemu run is impossible because Ubuntu's gcc-riscv64-linux-gnu ships only the lp64d sysroot; the static archive needs no libc link, so it still compiles riscv64/fenv.c (and every other source) under the single-float ABI. Co-Authored-By: Claude Opus 4.8 (1M context) --- .github/workflows/cross.yml | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/.github/workflows/cross.yml b/.github/workflows/cross.yml index e29ecc1c..b769bd7c 100644 --- a/.github/workflows/cross.yml +++ b/.github/workflows/cross.yml @@ -66,3 +66,35 @@ jobs: QEMU_LD_PREFIX: /usr/${{ matrix.config.triple }} LD_LIBRARY_PATH: . run: make test ARCH=$ARCH TOOLPREFIX=$TRIPLE- ${CC:+CC=$CC} ${AR:+AR=$AR} + + # Regression test for #262 / #349: the RISC-V single-float ABI (lp64f / + # ilp32f) used to be rejected by include/openlibm_fenv_riscv.h with an + # `#error`. This job rebuilds the whole library with `-mabi=lp64f` to make + # sure the header (and the rest of openlibm) accepts that ABI. + # + # This is a COMPILE-ONLY check (build the static libopenlibm.a, no qemu run). + # Ubuntu's gcc-riscv64-linux-gnu ships only the default lp64d sysroot, so a + # full shared-library link or a qemu execution under lp64f is impossible + # without a custom single-float sysroot the distro does not provide. Building + # the static archive needs no libc/CRT link, so it compiles every source file + # (including riscv64/fenv.c, which pulls in the fixed header) under the + # single-float ABI and directly regresses the removed `#error`. Adding a + # bespoke lp64f sysroot would be exactly the kind of fragile, unmaintainable + # toolchain dependency that got mips64 disabled in #347, so we deliberately + # avoid it. + build-cross-riscv64-lp64f: + runs-on: ubuntu-24.04 + timeout-minutes: 10 + name: build-cross-riscv64-lp64f + steps: + - uses: actions/checkout@v7 + - name: Install RISC-V toolchain + run: | + sudo apt update + sudo apt install -y gcc-riscv64-linux-gnu + - name: Build libopenlibm.a for the single-float ABI (lp64f) + run: | + make -j$(nproc) ARCH=riscv64 TOOLPREFIX=riscv64-linux-gnu- \ + CFLAGS_arch='-march=rv64imafc -mabi=lp64f' \ + SFLAGS_arch='-march=rv64imafc -mabi=lp64f' \ + libopenlibm.a