[Backport to 15] Use SPV_EXT_long_vector extension for non-standard vector size (#3777)

For a vector type, add `SPV_EXT_long_vector` extension and prioritize it
over `SPV_INTEL_vector_compute` whenever the vector type doesn't have a
standard component size (2, 3, 4, 8, or 16).

[Backport to 15] Keep VectorAnyINTEL for VectorCompute modules with SPV_EXT_long_vector (#3829)

#3777 added `SPV_EXT_long_vector` and gave it priority over
`SPV_INTEL_vector_compute`: when both extensions are enabled and a
vector has a non-standard component count, the translator now emits
`CapabilityLongVectorEXT` instead of `CapabilityVectorAnyINTEL`.

This regresses `VectorCompute` modules. The offloading flow (producing
both `VectorCompute` and non-`VectorCompute` modules) applies a single,
fixed extension list uniformly to every device image, so a
`VectorCompute` module is translated with both
`SPV_INTEL_vector_compute` and `SPV_EXT_long_vector` enabled. Before
#3777 such a module emitted `VectorAnyINTEL` for its non-standard
vectors; after #3777 it emits `LongVectorEXT`. `VectorCompute` consumers
require `VectorAnyINTEL`, so this is a functional regression.

Hence, the enabled extension list does not identify a module as
`VectorCompute` - the `VectorCompute` metadata (`VCFunction`
/`VCGlobalVariable`) does. `IsVectorComputeModule` records the presence
of that metadata before type translation. `VectorCompute` modules keep
using `VectorAnyINTEL`, restoring the pre-#3777 behavior; all other
modules still prefer the multi-vendor `LongVectorEXT` when its extension
is enabled.

Author: Qi-Ye-079

include/LLVMSPIRVExtensions.inc

@@ -92,3 +92,4 @@ EXT(SPV_INTEL_sigmoid)
 EXT(SPV_INTEL_float4)
 EXT(SPV_INTEL_fp_conversions)
 EXT(SPV_INTEL_rounded_divide_sqrt)
+EXT(SPV_EXT_long_vector)

lib/SPIRV/SPIRVWriter.cpp

@@ -359,6 +359,20 @@ SPIRVType *LLVMToSPIRVBase::transType(Type *T) {
   }
 
   if (auto *VecTy = dyn_cast<FixedVectorType>(T)) {
+    unsigned NumElements = VecTy->getNumElements();
+    bool IsNonStandardCount =
+        !(NumElements == 2 || NumElements == 3 || NumElements == 4 ||
+          NumElements == 8 || NumElements == 16);
+    if (IsNonStandardCount &&
+        !BM->isAllowedToUseExtension(ExtensionID::SPV_EXT_long_vector) &&
+        !BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_vector_compute)) {
+      BM->getErrorLog().checkError(
+          false, SPIRVEC_RequiresExtension,
+          "SPV_EXT_long_vector or SPV_INTEL_vector_compute\n"
+          "NOTE: LLVM module contains a vector with an unsupported number of "
+          "components, translation of which requires one of these extensions");
+      return nullptr;
+    }
     if (VecTy->getElementType()->isPointerTy()) {
       // SPV_INTEL_masked_gather_scatter extension changes 2.16.1. Universal
       // Validation Rules:
@@ -5091,12 +5105,29 @@ bool isEmptyLLVMModule(Module *M) {
          M->global_empty(); // No global variables
 }
 
+// A module is VectorCompute when any function or global variable carries
+// VectorCompute metadata.
+static bool hasVectorComputeMetadata(Module *M) {
+  return any_of(*M,
+                [](const Function &F) {
+                  return F.hasFnAttribute(kVCMetadata::VCFunction);
+                }) ||
+         any_of(M->globals(), [](const GlobalVariable &GV) {
+           return GV.hasAttribute(kVCMetadata::VCGlobalVariable);
+         });
+}
+
 bool LLVMToSPIRVBase::translate() {
   BM->setGeneratorVer(KTranslatorVer);
 
   if (isEmptyLLVMModule(M))
     BM->addCapability(CapabilityLinkage);
 
+  // Check before type translation so that SPIRVTypeVector can choose the
+  // matching capability.
+  if (BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_vector_compute))
+    BM->setVectorCompute(hasVectorComputeMetadata(M));
+
   // Use the type scavenger to recover pointer element types.
   Scavenger = std::make_unique<SPIRVTypeScavenger>(*M);
 

lib/SPIRV/libSPIRV/SPIRVEntry.h

@@ -913,6 +913,8 @@ class SPIRVCapability : public SPIRVEntryNoId<OpCapability> {
       return ExtensionID::SPV_INTEL_rounded_divide_sqrt;
     case internal::CapabilityDeviceBarrierINTEL:
       return ExtensionID::SPV_INTEL_device_barrier;
+    case CapabilityLongVectorEXT:
+      return ExtensionID::SPV_EXT_long_vector;
     default:
       return {};
     }

lib/SPIRV/libSPIRV/SPIRVModule.h

@@ -139,6 +139,8 @@ class SPIRVModule {
                               const std::string &) = 0;
   void setInvalid() { IsValid = false; }
   bool isModuleValid() { return IsValid; }
+  void setVectorCompute(bool E) { IsVectorCompute = E; }
+  bool isVectorCompute() const { return IsVectorCompute; }
 
   // Module query functions
   virtual SPIRVAddressingModelKind getAddressingModel() = 0;
@@ -648,6 +650,7 @@ class SPIRVModule {
 
 private:
   bool IsValid;
+  bool IsVectorCompute = false;
 };
 
 #ifdef _SPIRV_SUPPORT_TEXT_FMT

lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h

@@ -608,6 +608,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
   add(CapabilityLongCompositesINTEL, "LongCompositesINTEL");
   add(CapabilityOptNoneEXT, "OptNoneEXT");
   add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT");
+  add(CapabilityLongVectorEXT, "LongVectorEXT");
   add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL");
   add(CapabilitySplitBarrierINTEL, "SplitBarrierINTEL");
   add(CapabilityGlobalVariableFPGADecorationsINTEL,

lib/SPIRV/libSPIRV/SPIRVType.h

@@ -383,10 +383,17 @@ class SPIRVTypeVector : public SPIRVType {
     if (CompCount == 8 || CompCount == 16)
       V.push_back(CapabilityVector16);
 
-    if (Module->isAllowedToUseExtension(ExtensionID::SPV_INTEL_vector_compute))
-      if (CompCount == 1 || (CompCount > 4 && CompCount < 8) ||
-          (CompCount > 8 && CompCount < 16) || CompCount > 16)
+    if (CompCount == 1 || (CompCount > 4 && CompCount < 8) ||
+        (CompCount > 8 && CompCount < 16) || CompCount > 16) {
+      // A VectorCompute module keeps using CapabilityVectorAnyINTEL;
+      // otherwise use multi-vendor LongVectorEXT
+      if (!Module->isVectorCompute() &&
+          Module->isAllowedToUseExtension(ExtensionID::SPV_EXT_long_vector))
+        V.push_back(CapabilityLongVectorEXT);
+      else if (Module->isAllowedToUseExtension(
+                   ExtensionID::SPV_INTEL_vector_compute))
         V.push_back(CapabilityVectorAnyINTEL);
+    }
     return V;
   }
 
@@ -400,7 +407,8 @@ class SPIRVTypeVector : public SPIRVType {
     SPIRVEntry::validate();
     CompType->validate();
 #ifndef NDEBUG
-    if (!(Module->isAllowedToUseExtension(
+    if (!Module->isAllowedToUseExtension(ExtensionID::SPV_EXT_long_vector) &&
+        !(Module->isAllowedToUseExtension(
             ExtensionID::SPV_INTEL_vector_compute))) {
       assert(CompCount == 2 || CompCount == 3 || CompCount == 4 ||
              CompCount == 8 || CompCount == 16);

test/extensions/EXT/SPV_EXT_long_vector/priority_over_vector_compute.ll

@@ -0,0 +1,15 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_EXT_long_vector,+SPV_INTEL_vector_compute -o %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s --implicit-check-not="Capability VectorAnyINTEL"
+; RUN: spirv-val %t.spv
+
+; CHECK-DAG: Capability LongVectorEXT
+; CHECK-DAG: Extension "SPV_EXT_long_vector"
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-unknown"
+
+define spir_func void @test_vec1(<1 x float> %v) {
+entry:
+  ret void
+}

test/extensions/EXT/SPV_EXT_long_vector/priority_over_vector_compute_size_5.ll

@@ -0,0 +1,15 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_EXT_long_vector,+SPV_INTEL_vector_compute -o %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s --implicit-check-not="Capability VectorAnyINTEL"
+; RUN: spirv-val %t.spv
+
+; CHECK-DAG: Capability LongVectorEXT
+; CHECK-DAG: Extension "SPV_EXT_long_vector"
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-unknown"
+
+define spir_func void @test_vec5(<5 x float> %v) {
+entry:
+  ret void
+}

test/extensions/EXT/SPV_EXT_long_vector/vector_size_1.ll

@@ -0,0 +1,28 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_EXT_long_vector -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s
+
+; RUN: llvm-as %s -o %t.bc
+; RUN: not llvm-spirv %t.bc 2>&1 | FileCheck %s --check-prefix=ERROR
+
+; CHECK-DAG: Capability LongVectorEXT
+; CHECK-DAG: Extension "SPV_EXT_long_vector"
+; CHECK-DAG: TypeFloat [[#F32:]] 32
+; CHECK-DAG: TypeVector [[#]] [[#F32]] 1
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-unknown"
+
+define spir_func void @test_vec1(<1 x float> %v1) {
+entry:
+  ret void
+}
+
+; ERROR: RequiresExtension: Feature requires the following SPIR-V extension:
+; ERROR-NEXT: SPV_EXT_long_vector or SPV_INTEL_vector_compute
+
+define spir_func void @test_no_ext(<1 x float> %v) {
+entry:
+  ret void
+}

test/extensions/EXT/SPV_EXT_long_vector/vector_size_5.ll

@@ -0,0 +1,28 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_EXT_long_vector -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s
+
+; RUN: llvm-as %s -o %t.bc
+; RUN: not llvm-spirv %t.bc 2>&1 | FileCheck %s --check-prefix=ERROR
+
+; CHECK-DAG: Capability LongVectorEXT
+; CHECK-DAG: Extension "SPV_EXT_long_vector"
+; CHECK-DAG: TypeFloat [[#F32:]] 32
+; CHECK-DAG: TypeVector [[#]] [[#F32]] 5
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-unknown"
+
+define spir_func void @test_vec5(<5 x float> %v) {
+entry:
+  ret void
+}
+
+; ERROR: RequiresExtension: Feature requires the following SPIR-V extension:
+; ERROR-NEXT: SPV_EXT_long_vector or SPV_INTEL_vector_compute
+
+define spir_func void @test_no_ext(<5 x float> %v) {
+entry:
+  ret void
+}