[D3D12] Safeguard index and vertex buffer accesses

Author: RobDangerous

backends/gpu/direct3d12/includes/kore3/direct3d12/commandlist_functions.h

@@ -98,7 +98,7 @@ void kore_d3d12_command_list_draw_indexed_indirect(kore_gpu_command_list *list,
 
 void kore_d3d12_command_list_compute_indirect(kore_gpu_command_list *list, kore_gpu_buffer *indirect_buffer, uint64_t indirect_offset);
 
-void kore_d3d12_command_list_queue_buffer_access(kore_gpu_command_list *list, kore_gpu_buffer *buffer, uint32_t offset, uint32_t size);
+void kore_d3d12_command_list_queue_buffer_access(kore_gpu_command_list *list, kore_d3d12_buffer *buffer, uint32_t offset, uint32_t size);
 
 void kore_d3d12_command_list_queue_descriptor_set_access(kore_gpu_command_list *list, kore_d3d12_descriptor_set *descriptor_set);
 

backends/gpu/direct3d12/includes/kore3/direct3d12/commandlist_structs.h

@@ -30,9 +30,9 @@ struct ID3D12Fence;
 #define KORE_D3D12_COMMAND_LIST_MAX_QUEUED_DESCRIPTOR_SET_ACCESSES 256
 
 typedef struct kore_d3d12_buffer_access {
-	kore_gpu_buffer *buffer;
-	uint64_t         offset;
-	uint64_t         size;
+	kore_d3d12_buffer *buffer;
+	uint64_t           offset;
+	uint64_t           size;
 } kore_d3d12_buffer_access;
 
 typedef struct kore_d3d12_command_list {

backends/gpu/direct3d12/sources/commandlist.c

@@ -192,6 +192,10 @@ void kore_d3d12_command_list_set_index_buffer(kore_gpu_command_list *list, kore_
 	view.Format         = index_format == KORE_GPU_INDEX_FORMAT_UINT16 ? DXGI_FORMAT_R16_UINT : DXGI_FORMAT_R32_UINT;
 
 	COM_CALL1(list->d3d12.list, IASetIndexBuffer, &view);
+
+	if (buffer->d3d12.cpu_read || buffer->d3d12.cpu_write) {
+		kore_d3d12_command_list_queue_buffer_access(list, &buffer->d3d12, (uint32_t)offset, (uint32_t)(buffer->d3d12.size - offset));
+	}
 }
 
 void kore_d3d12_command_list_set_vertex_buffer(kore_gpu_command_list *list, uint32_t slot, kore_d3d12_buffer *buffer, uint64_t offset, uint64_t size,
@@ -205,6 +209,10 @@ void kore_d3d12_command_list_set_vertex_buffer(kore_gpu_command_list *list, uint
 	view.StrideInBytes  = (UINT)stride;
 
 	COM_CALL3(list->d3d12.list, IASetVertexBuffers, slot, 1, &view);
+
+	if (buffer->cpu_read || buffer->cpu_write) {
+		kore_d3d12_command_list_queue_buffer_access(list, buffer, (uint32_t)offset, (uint32_t)size);
+	}
 }
 
 void kore_d3d12_command_list_set_render_pipeline(kore_gpu_command_list *list, kore_d3d12_render_pipeline *pipeline) {
@@ -786,7 +794,7 @@ void kore_d3d12_command_list_compute_indirect(kore_gpu_command_list *list, kore_
 	          0);
 }
 
-void kore_d3d12_command_list_queue_buffer_access(kore_gpu_command_list *list, kore_gpu_buffer *buffer, uint32_t offset, uint32_t size) {
+void kore_d3d12_command_list_queue_buffer_access(kore_gpu_command_list *list, kore_d3d12_buffer *buffer, uint32_t offset, uint32_t size) {
 	kore_d3d12_buffer_access access;
 	access.buffer = buffer;
 	access.offset = offset;

backends/gpu/direct3d12/sources/descriptorset.c

@@ -193,7 +193,7 @@ void kore_d3d12_descriptor_set_prepare_cbv_buffer(kore_gpu_command_list *list, k
 	}
 
 	if (buffer->d3d12.cpu_read || buffer->d3d12.cpu_write) {
-		kore_d3d12_command_list_queue_buffer_access(list, buffer, offset, size);
+		kore_d3d12_command_list_queue_buffer_access(list, &buffer->d3d12, offset, size);
 	}
 }
 
@@ -213,7 +213,7 @@ void kore_d3d12_descriptor_set_prepare_uav_buffer(kore_gpu_command_list *list, k
 	}
 
 	if (buffer->d3d12.cpu_read || buffer->d3d12.cpu_write) {
-		kore_d3d12_command_list_queue_buffer_access(list, buffer, offset, size);
+		kore_d3d12_command_list_queue_buffer_access(list, &buffer->d3d12, offset, size);
 	}
 }
 

backends/gpu/direct3d12/sources/device.c

@@ -612,19 +612,19 @@ static void wait_for_frame(kore_gpu_device *device, uint64_t frame_index) {
 	wait_for_fence(device, device->d3d12.frame_fence, device->d3d12.frame_event, frame_index);
 }
 
-static void clean_buffer_accesses(kore_gpu_buffer *buffer, uint64_t finished_execution_index) {
+static void clean_buffer_accesses(kore_d3d12_buffer *buffer, uint64_t finished_execution_index) {
 	kore_d3d12_buffer_range ranges[KORE_D3D12_MAX_BUFFER_RANGES];
 	uint32_t                ranges_count = 0;
 
-	for (uint32_t range_index = 0; range_index < buffer->d3d12.ranges_count; ++range_index) {
-		if (buffer->d3d12.ranges[range_index].execution_index > finished_execution_index) {
-			ranges[ranges_count] = buffer->d3d12.ranges[range_index];
+	for (uint32_t range_index = 0; range_index < buffer->ranges_count; ++range_index) {
+		if (buffer->ranges[range_index].execution_index > finished_execution_index) {
+			ranges[ranges_count] = buffer->ranges[range_index];
 			ranges_count += 1;
 		}
 	}
 
-	memcpy(&buffer->d3d12.ranges, &ranges, sizeof(ranges));
-	buffer->d3d12.ranges_count = ranges_count;
+	memcpy(&buffer->ranges, &ranges, sizeof(ranges));
+	buffer->ranges_count = ranges_count;
 }
 
 void kore_d3d12_device_execute_command_list(kore_gpu_device *device, kore_gpu_command_list *list) {
@@ -654,15 +654,15 @@ void kore_d3d12_device_execute_command_list(kore_gpu_device *device, kore_gpu_co
 
 	for (uint32_t buffer_access_index = 0; buffer_access_index < list->d3d12.queued_buffer_accesses_count; ++buffer_access_index) {
 		kore_d3d12_buffer_access access = list->d3d12.queued_buffer_accesses[buffer_access_index];
-		kore_gpu_buffer         *buffer = access.buffer;
+		kore_d3d12_buffer       *buffer = access.buffer;
 
 		clean_buffer_accesses(buffer, COM_CALL0(device->d3d12.execution_fence, GetCompletedValue));
 
-		assert(buffer->d3d12.ranges_count < KORE_D3D12_MAX_BUFFER_RANGES);
-		buffer->d3d12.ranges[buffer->d3d12.ranges_count].execution_index = device->d3d12.execution_index;
-		buffer->d3d12.ranges[buffer->d3d12.ranges_count].offset          = access.offset;
-		buffer->d3d12.ranges[buffer->d3d12.ranges_count].size            = access.size;
-		buffer->d3d12.ranges_count += 1;
+		assert(buffer->ranges_count < KORE_D3D12_MAX_BUFFER_RANGES);
+		buffer->ranges[buffer->ranges_count].execution_index = device->d3d12.execution_index;
+		buffer->ranges[buffer->ranges_count].offset          = access.offset;
+		buffer->ranges[buffer->ranges_count].size            = access.size;
+		buffer->ranges_count += 1;
 	}
 	list->d3d12.queued_buffer_accesses_count = 0;