fix: correct benchmark paths and improve code quality

- Fix benchmark paths in documentation (aos_vs_soa_bench)
- Pin RapidCheck to v1.1.2 for reproducible builds
- Use std::hardware_destructive_interference_size for cache line size
- Fix AlignedArray move constructor with std::exchange
- Add ARM platform compatibility for SIMD tests

Author: LessUp

README.md

@@ -89,7 +89,7 @@ ctest --preset=release
 ### Run Your First Benchmark
 
 ```bash
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 See 2-20x speedup between AOS and SOA data layouts!

README.zh-CN.md

@@ -89,7 +89,7 @@ ctest --preset=release
 ### 运行你的第一个基准测试
 
 ```bash
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 见证 AOS 与 SOA 数据布局之间 2-20 倍的性能提升！

cmake/Dependencies.cmake

@@ -57,11 +57,11 @@ endfunction()
 #------------------------------------------------------------------------------
 function(hpc_fetch_rapidcheck)
     message(STATUS "Fetching RapidCheck...")
-    
+
     FetchContent_Declare(
         rapidcheck
         GIT_REPOSITORY https://github.com/emil-e/rapidcheck.git
-        GIT_TAG        master
+        GIT_TAG        v1.1.2
         GIT_SHALLOW    TRUE
     )
 

docs/en/getting-started/installation.md

@@ -171,7 +171,7 @@ cmake --build build/release
 ctest --preset=release
 
 # Run a benchmark
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 ---

docs/en/getting-started/quickstart.md

@@ -54,7 +54,7 @@ ctest --preset=release
 ### 5. Run a Benchmark
 
 ```bash
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 ---

docs/zh/getting-started/installation.md

@@ -171,7 +171,7 @@ cmake --build build/release
 ctest --preset=release
 
 # 运行基准测试
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 ---

docs/zh/getting-started/quickstart.md

@@ -54,7 +54,7 @@ ctest --preset=release
 ### 5. 运行基准测试
 
 ```bash
-./build/release/examples/02-memory-cache/bench/aos_soa_bench
+./build/release/examples/02-memory-cache/aos_vs_soa_bench
 ```
 
 ---

examples/02-memory-cache/include/memory_utils.hpp

@@ -19,8 +19,14 @@ namespace hpc::memory {
 // Constants
 //------------------------------------------------------------------------------
 
-/// Typical cache line size on modern x86 processors
-constexpr std::size_t CACHE_LINE_SIZE = 64;
+/// Cache line size - use std::hardware_destructive_interference_size when available
+#if defined(__cpp_lib_hardware_interference_size)
+    constexpr std::size_t CACHE_LINE_SIZE = std::hardware_destructive_interference_size;
+#else
+    /// Fallback: typical cache line size on x86/ARM (64 bytes)
+    /// Note: Some ARM systems may have 128-byte cache lines
+    constexpr std::size_t CACHE_LINE_SIZE = 64;
+#endif
 
 /// Page size on most systems
 constexpr std::size_t PAGE_SIZE = 4096;

examples/02-memory-cache/src/alignment.cpp

@@ -55,11 +55,9 @@ class AlignedArray {
 
     // Movable
     AlignedArray(AlignedArray&& other) noexcept
-        : size_(other.size_), data_(other.data_)
-    {
-        other.size_ = 0;
-        other.data_ = nullptr;
-    }
+        : size_(std::exchange(other.size_, 0))
+        , data_(std::exchange(other.data_, nullptr))
+    {}
 
     T* data() { return data_; }
     const T* data() const { return data_; }

examples/05-concurrency/include/concurrency_utils.hpp

@@ -5,6 +5,7 @@
 #include <vector>
 #include <functional>
 #include <chrono>
+#include <new>  // for std::hardware_destructive_interference_size
 
 namespace hpc::concurrency {
 
@@ -14,8 +15,13 @@ inline unsigned int hardware_concurrency() {
     return n > 0 ? n : 1;
 }
 
-/// Cache line size for alignment
-constexpr size_t CACHE_LINE_SIZE = 64;
+/// Cache line size for alignment - use std::hardware_destructive_interference_size when available
+#if defined(__cpp_lib_hardware_interference_size)
+    constexpr size_t CACHE_LINE_SIZE = std::hardware_destructive_interference_size;
+#else
+    /// Fallback: typical cache line size on x86/ARM (64 bytes)
+    constexpr size_t CACHE_LINE_SIZE = 64;
+#endif
 
 /// Aligned atomic counter to avoid false sharing
 struct alignas(CACHE_LINE_SIZE) AlignedCounter {