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Merge pull request #1866 from smoe/docs_stupid_simple_stuff
Docs stupid simple stuff
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docs/man/man3/hm2_bspi_setup_chan.3hm2

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@@ -39,8 +39,8 @@ handling. (values 32 and below require no special handling)
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.IP mhz
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sets the chip communication rate. The maximum value for this is
42-
half the FPGA base frequency, so for example with a 48MHz 5i23 the max SPI
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frequency is 24Mhz. Values in excess of the max supported will be silently
42+
half the FPGA base frequency, so for example with a 48 MHz 5i23 the max SPI
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frequency is 24 MHz. Values in excess of the max supported will be silently
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rounded down.
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.IP delay

docs/man/man3/hm2_uart_setup.3hm2

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@@ -17,7 +17,7 @@ setup. The names of the available UARTs are printed to standard output during
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the driver loading process and take the form:
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hm2_<board name>.<board index>.uart.<index> For example hm2_5i23.0.uart.0
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The minimum bitrate is approximately 50bps, and the maximum around the FPGA
20-
frequency, 48MHz for a 5i23.
20+
frequency, 48 MHz for a 5i23.
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The UART function allows different RX and TX bitrates, but that is not currently
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supported by this driver
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docs/man/man9/encoder.9

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@@ -9,7 +9,7 @@ encoder \- software counting of quadrature encoder signals
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\fBencoder\fR is used to measure position by counting the pulses
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generated by a quadrature encoder. As a software-based implementation
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it is much less expensive than hardware, but has a limited maximum
12-
count rate. The limit is in the range of 10KHz to 50KHz, depending
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count rate. The limit is in the range of 10 kHz to 50 kHz, depending
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on the computer speed and other factors. If better performance is
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needed, a hardware encoder counter is a better choice.
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Some hardware-based systems can count at MHz rates.

docs/man/man9/hostmot2.9

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@@ -276,7 +276,7 @@ maximum variation between read times. \-100 will suffice for most systems, and
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For serial encoders, the value also needs to include the time it takes to
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transfer the absolute encoder position. For instance, if 50 bits must be read
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at 500kHz then subtract an additional 50/500kHz = 100uS to get a starting value
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at 500 kHz then subtract an additional 50/500 kHz = 100 µs to get a starting value
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of \-200.
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The xy2mod uses 2 DPLL timers, one for read and one for write. The read timer value
@@ -780,7 +780,7 @@ It is not appropriate to use this parameter for index-homing of axis drives.
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This pin sets the excitation frequency for
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the resolver. This pin is module-level rather than instance-level as all
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resolvers share the same excitation frequency.
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Valid values are 10 (~10kHz), 5 (~5kHz) and 2.5 (~2.5kHz). The
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Valid values are 10 (~10 kHz), 5 (~5 kHz) and 2.5 (~2.5 kHz). The
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actual frequency depends on the FPGA frequency, and they correspond to
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CLOCK_LOW/5000, CLOCK_LOW/10000 and CLOCK_LOW/20000 respectively.
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The parameter will be set to the closest available of the three frequencies.
@@ -882,7 +882,7 @@ to 50% results in a 1 MHz square wave, identical to a 1 MHz PWM signal
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with 50% duty cycle. The effective range of this parameter is from
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about 1525 Hz up to just under 200 MHz. Note that the max frequency
884884
is determined by the ClockHigh frequency of the Anything IO board; the
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5i25 and 7i92 both have a 100 MHz clock, resulting in a 100 Mhz max
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5i25 and 7i92 both have a 100 MHz clock, resulting in a 100 MHz max
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PDM frequency. Other boards may have different clocks, resulting in
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different max PDM frequencies. If the user attempts to set the frequency
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too high, it will be clipped to the max supported frequency of the board.
@@ -963,8 +963,8 @@ that affects all instances
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.TP
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(u32 rw) frequency
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Sets the master PWM frequency. Maximum is approx 48kHz, minimum
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is 1kHz. Defaults to 20kHz.
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Sets the master PWM frequency. Maximum is approx 48 kHz, minimum
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is 1 kHz. Defaults to 20 kHz.
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.SS rcpwmgen
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The rcpwmgen is a simple PWM generator optimized for use with standard RC servos
@@ -980,7 +980,7 @@ Pins:
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.TP
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(float rw) rate
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Sets the master RC PWM frequency. Maximum is 1 KHz, minimum
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Sets the master RC PWM frequency. Maximum is 1 kHz, minimum
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is .01 Hz. Defaults to 50 Hz.
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.TP
@@ -1195,7 +1195,7 @@ reduces following errors.
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.SS Smart Serial Interface
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11971197
The Smart Serial Interface allows up to 32 different devices such as the Mesa
1198-
8i20 2.2kW 3-phase drive or 7i64 48-way IO cards to be connected to a single
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8i20 2.2 kW 3-phase drive or 7i64 48-way IO cards to be connected to a single
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FPGA card.
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The driver auto-detects the connected hardware port, channel and device type.
12011201
Devices can be connected in any order to any active channel of an active port.
@@ -1374,20 +1374,20 @@ Parameters:
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.TP
13761376
(u32 in) scan_rate
1377-
This sets the input scan rate in Hz. Default scan rate is 20 KHz
1378-
(50 uS scan period).
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This sets the input scan rate in Hz. Default scan rate is 20 kHz
1378+
(50 µs scan period).
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13801380
.TP
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(u32 in) fast_scans
13821382
This sets the fast time constant for all input pins. This is the time constant
13831383
used when the input-slow pin for the corresponding input is False. The range is 0 to
1384-
63 scan periods and the default value is 5 = 250 uS at the default 20 Khz scan_rate.
1384+
63 scan periods and the default value is 5 = 250 µs at the default 20 kHz scan_rate.
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13861386
.TP
13871387
(u32 in) slow_scans
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This sets the slow time constant for all input pins. This is the time constant
13891389
used when the input-slow pin for the corresponding input is True. The range is 0 to 1023
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scan periods and the default value is 500 = 25 mS at the default 20 Khz scan_rate.
1390+
scan periods and the default value is 500 = 25 ms at the default 20 kHz scan_rate.
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13921392
.TP
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(bit in) enc0_4xmode, enc1_4xmode, enc2_4xmode, and enc3_4xmode

docs/man/man9/pwmgen.9

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@@ -107,7 +107,7 @@ Modulation.
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\fBpwmgen.\fIN\fB.dither\-pwm\fR bit in/out
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Because software-generated PWM uses a fairly slow timebase (several to many
109109
microseconds), it has limited resolution. For example, if \fBmake\-pulses\fR
110-
is called at a 20KHz rate, and \fBpwm\-freq\fR is 2KHz, there are only 10
110+
is called at a 20 kHz rate, and \fBpwm\-freq\fR is 2 kHz, there are only 10
111111
possible duty cycles. If \fBdither\-pwm\fR is false, the commanded duty cycle
112112
will be rounded to the nearest of those values. Assuming \fBvalue\fR remains
113113
constant, the same output will repeat every PWM cycle. If \fBdither\-pwm\fR is

docs/man/man9/sserial.9

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@@ -88,7 +88,7 @@ The following list of Smart Serial devices is by no means exhaustive.
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8989
.TP
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.SH 8i20
91-
The 8i20 is a 2.2kW three-phase drive for brushless DC motors and AC servo
91+
The 8i20 is a 2.2 kW three-phase drive for brushless DC motors and AC servo
9292
motors.
9393
8i20 pins and parameters have names like
9494
"hm2_\fI<BoardType>\fR.\fI<BoardNum>\fR.8i20.\fI<PortNum>\fR.\fI<ChanNum>\fR.\fI<Pin>\fR", for example
@@ -480,7 +480,7 @@ Utilities exist to update and change this firmware.
480480
.SH 7i73
481481
The 7I73 is a remote real time pendant or control panel interface.
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483-
The 7I73 supports up to four 50KHz encoder inputs for MPGs, 8 digital inputs
483+
The 7I73 supports up to four 50 kHz encoder inputs for MPGs, 8 digital inputs
484484
and 6 digital outputs and up to a 64 Key keypad. If a smaller keypad is used,
485485
more digital inputs and outputs become available. Up to eight 0.0V to 3.3V
486486
analog inputs are also provided.

docs/man/man9/stepgen.9

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@@ -8,7 +8,7 @@ stepgen \- software step pulse generation
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.SH DESCRIPTION
99
\fBstepgen\fR is used to control stepper motors. The maximum
1010
step rate depends on the CPU and other factors, and is usually in the range
11-
of 5KHz to 25KHz. If higher rates are needed, a hardware step generator
11+
of 5 kHz to 25 kHz. If higher rates are needed, a hardware step generator
1212
is a better choice.
1313
.P
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\fBstepgen\fR has two control modes, which can be selected on a channel

docs/src/config/ini-config.adoc

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@@ -881,7 +881,7 @@ Basically, if a segment will complete in less time than 1 /
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ARC_BLEND_RAMP_FREQ, we don't bother with a trapezoidal velocity profile
882882
on that segment, and use constant acceleration. (Setting
883883
ARC_BLEND_RAMP_FREQ = 1000 is equivalent to always using trapezoidal
884-
acceleration, if the servo loop is 1kHz).
884+
acceleration, if the servo loop is 1 kHz).
885885
+
886886
You can characterize the worst-case loss of performance by comparing the
887887
velocity that a trapezoidal profile reaches vs. the ramp:
@@ -894,14 +894,14 @@ velocity that a trapezoidal profile reaches vs. the ramp:
894894
# f = cutoff frequency from INI
895895
----
896896
+
897-
For the aforementioned machine, the ripple for a 20Hz cutoff frequency
897+
For the aforementioned machine, the ripple for a 20 Hz cutoff frequency
898898
is 100 / (4 * 20) = 1.25 IPS. This seems high, but keep in mind that it
899899
is only a worst-case estimate. In reality , the trapezoidal motion
900900
profile is limited by other factors, such as normal acceleration or
901901
requested velocity, and so the actual performance loss should be much
902902
smaller. Increasing the cutoff frequency can squeeze out more
903903
performance, but make the motion rougher due to acceleration
904-
discontinuities. A value in the range 20Hz to 200Hz should be reasonable
904+
discontinuities. A value in the range 20 Hz to 200 Hz should be reasonable
905905
to start.
906906

907907
Finally, no amount of tweaking will speed up a toolpath with lots of

docs/src/config/pncconf.adoc

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@@ -373,11 +373,11 @@ If using Mesa daughter boards the docs for the board should give recommendations
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It's important to follow these to avoid damage and get the best performance.
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375375
....
376-
The 7i33 requires PDM and a PDM base frequency of 6 mHz
377-
The 7i29 requires PWM and a PWM base frequency of 20 Khz
378-
The 7i30 requires PWM and a PWM base frequency of 20 Khz
379-
The 7i40 requires PWM and a PWM base frequency of 50 Khz
380-
The 7i48 requires UDM and a PWM base frequency of 24 Khz
376+
The 7i33 requires PDM and a PDM base frequency of 6 MHz
377+
The 7i29 requires PWM and a PWM base frequency of 20 kHz
378+
The 7i30 requires PWM and a PWM base frequency of 20 kHz
379+
The 7i40 requires PWM and a PWM base frequency of 50 kHz
380+
The 7i48 requires UDM and a PWM base frequency of 24 kHz
381381
....
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383383
Watchdog time out:: is used to set how long the MESA board will wait before

docs/src/config/python-interface.adoc

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@@ -751,12 +751,12 @@ c.tool_offset(toolno, z_offset, x_offset, diameter, frontangle, backangle, orie
751751
`spindle(direction: int, speed: float=0, spindle: int=0, wait_for_speed: int=0)`::
752752
- Direction: [SPINDLE_FORWARD, SPINDLE_REVERSE, SPINDLE_OFF, SPINDLE_INCREASE,
753753
SPINDLE_DECREASE, or SPINDLE_CONSTANT]
754-
- Speed: Speed in RPM, defaults to 0
755-
- Spindle: Spindle number to command defaults to 0
754+
- Speed: Speed in RPM, defaults to 0.
755+
- Spindle: Spindle number to command defaults to 0.
756756
- Wait_for_speed: if 1 motion will wait for speed before continuing, defaults to not.
757757

758758
[WARNING]
759-
MDI commands will ignore this. "S1000" after this will turn the spindle off
759+
MDI commands will ignore this. "S1000" after this will turn the spindle off.
760760

761761
`text_msg(string)`::
762762
sends a operator text message to the screen. (max 254 characters)

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