Describe the bug
In Logisim-ITA 2.16.2.2, when using a RAM component configured with the "Separate load and store ports" mode, the ld (load) pin is missing. By definition, having separate ports requires two distinct control pins (st and ld). This functionality has been present since the earliest versions of this fork and appears to have been accidentally removed.

To Reproduce

1. Place a RAM component.
2. Change the "Data Interface" property to "Separate load and store ports".
3. Observe that the st pin is present, but the ld pin is missing.

Root Cause Analysis
I compared this to version 2.16.1.3 (where it worked correctly) and read the diffs. This regression was introduced in 2.16.1.4 alongside the "simplified mode" for RAM/ROM.

In src/main/java/com/cburch/logisim/std/memory/Ram.java (around line 282 as of the 2.16.1.4 tag), the clause to draw the ld pin (named OE in the code) was mistakenly (possibly) moved inside an if (!separate) branch. Because of this, when "separate" is true, the load pin is no longer drawn or evaluated correctly.

Expected behavior
The OE / ld pin logic should be evaluated and drawn regardless of whether the ports are combined or separated, so the component can function correctly.