In the code segment, it seems that there can be a timing issue if the guard cycles are all 0. It seems like the code requires a minimum guard cycle of 1.
wait until rising_edge(vid_fval_in);
Log(ModelID, "New frame started in VideoBusRx!", INFO);
pixelCount := 0;
lineCount := 0;
while (vid_fval_in = '1') loop
wait until rising_edge(Clk);
if (vid_lval_in = '1') then
pixelCount := 0;
while (vid_lval_in = '1') loop
wait until rising_edge(Clk);
if (vid_dval_in = '1') then
Generally, I like keeping the whole VC aligned to clock, so the first wait would be replaced by:
wait on Clk until rising_edge(Clk) and vid_fval_in = '1' ;
However, this would just further contribute to delays. OTOH, I think this and my above concerns would be addressed by moving the I suspect though that the remaining wait until rising_edge(Clk) may need to be after the end if rather than before. That would allow the 0 guard cycles.
In the code segment, it seems that there can be a timing issue if the guard cycles are all 0. It seems like the code requires a minimum guard cycle of 1.
Generally, I like keeping the whole VC aligned to clock, so the first wait would be replaced by:
However, this would just further contribute to delays. OTOH, I think this and my above concerns would be addressed by moving the I suspect though that the remaining
wait until rising_edge(Clk)may need to be after theend ifrather than before. That would allow the 0 guard cycles.