Running Alu tests

Author: outercloudstudio

.gitignore

@@ -4,4 +4,6 @@ target/
 generated/
 project/
 test_run_dir/
-quartus/
+quartus/
+.bsp/
+.bloop/

Makefile

@@ -6,6 +6,3 @@ doit:
 test:
 	sbt test
 
-clean:
-	git clean -fd
-

src/main/scala/empty/Add.scala

@@ -1,8 +1,3 @@
-//> using scala "2.13.12"
-//> using dep "org.chipsalliance::chisel:6.7.0"
-//> using plugin "org.chipsalliance:::chisel-plugin:6.7.0"
-//> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings", "-Ywarn-dead-code", "-Ywarn-unused", "-Ymacro-annotations"
-
 import chisel3._
 import chisel3.util._
 import _root_.circt.stage.ChiselStage
@@ -54,12 +49,3 @@ class Alu extends Module {
     }
   }
 }
-
-object Main extends App {
-  println(
-    ChiselStage.emitSystemVerilog(
-      gen = new Alu,
-      firtoolOpts = Array("-disable-all-randomization", "-strip-debug-info")
-    )
-  )
-}

src/main/alu.scala src/main/scala/main/Alu.scalasrc/main/alu.scala renamed to src/main/scala/main/Alu.scala

@@ -0,0 +1,8 @@
+import chisel3._
+import chisel3.util._
+import _root_.circt.stage.ChiselStage
+
+object Main extends App {
+    println("Generating Alu")
+    emitVerilog(new Alu(), Array("--target-dir", "generated"))
+}

src/main/scala/main/Main.scala

@@ -0,0 +1,19 @@
+import chisel3._
+import chiseltest._
+import org.scalatest.flatspec.AnyFlatSpec
+
+class AluTest extends AnyFlatSpec with ChiselScalatestTester {
+  "Alu" should "work" in {
+    test(new Alu) { dut =>
+      for (a <- 0 to 2) {
+        for (b <- 0 to 3) {
+          // val result = a + b
+          // dut.io.a.poke(a.U)
+          // dut.io.b.poke(b.U)
+          // dut.clock.step(1)
+          // dut.io.c.expect(result.U)
+        }
+      }
+    }
+  }
+}