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Use thread to drive dispatcher
1 parent bc4b765 commit 8430435

3 files changed

Lines changed: 8 additions & 11 deletions

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src/main/scala/main/Core.scala

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,15 +8,13 @@ class Core extends Module {
88
val debug_memory_write_address = Input(UInt(8.W));
99
val debug_memory_write_data = Input(UInt(8.W));
1010

11-
val debug_dispatcher_thread_requesting_opcode = Input(Bool());
12-
val debug_dispatcher_thread_program_pointer = Input(UInt(8.W));
13-
1411
val debug_dispatcher_opcode = Output(Operation());
1512
val debug_dispatcher_program_pointer = Output(UInt(8.W));
1613
});
1714

1815
val memory = Module(new Memory());
1916
val dispatcher = Module(new Dispatcher());
17+
val thread = Module(new Thread());
2018

2119
memory.io.readPorts(0).enable := dispatcher.io.read_requested;
2220
memory.io.readPorts(0).address := dispatcher.io.read_program_pointer;
@@ -25,8 +23,8 @@ class Core extends Module {
2523
memory.io.writePorts(0).address := io.debug_memory_write_address;
2624
memory.io.writePorts(0).data := io.debug_memory_write_data;
2725

28-
dispatcher.io.thread_requesting_opcode := io.debug_dispatcher_thread_requesting_opcode;
29-
dispatcher.io.thread_program_pointer := io.debug_dispatcher_thread_program_pointer;
26+
dispatcher.io.thread_requesting_opcode := thread.io.idle;
27+
dispatcher.io.thread_program_pointer := thread.io.program_pointer;
3028

3129
val read_ready_delayed = RegNext(dispatcher.io.read_requested, false.B);
3230
dispatcher.io.read_ready := read_ready_delayed;
@@ -42,10 +40,9 @@ class Core extends Module {
4240
io.debug_dispatcher_opcode := dispatcher.io.opcode;
4341
io.debug_dispatcher_program_pointer := dispatcher.io.program_pointer;
4442

45-
val thread = Module(new Thread());
4643
thread.io.dispatcher_opcode_loaded := dispatcher.io.opcode_loaded;
4744
thread.io.dispatcher_program_pointer := dispatcher.io.program_pointer;
4845
thread.io.operation := dispatcher.io.opcode;
49-
thread.io.immediate_a := 0.U(8.W);
50-
thread.io.immediate_b := 0.U(8.W);
46+
thread.io.immediate_a := 2.U(8.W);
47+
thread.io.immediate_b := 3.U(8.W);
5148
}

src/main/scala/main/Thread.scala

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ class Thread extends Module {
1111
val immediate_a = Input(UInt(8.W));
1212
val immediate_b = Input(UInt(8.W));
1313

14+
val program_pointer = Output(UInt(8.W));
1415
val end_of_program = Output(Bool());
1516
val idle = Output(Bool());
1617
val debug_output = Output(UInt(8.W));
@@ -38,6 +39,8 @@ class Thread extends Module {
3839
program_counter.io.branch := false.B;
3940
program_counter.io.jump_location := 0.U(8.W);
4041
program_counter.io.target_nzp := 0.U(3.W);
42+
43+
io.program_pointer := program_counter.io.program_counter;
4144

4245
io.debug_output := 0.U(8.W);
4346

src/test/scala/main/CoreTest.scala

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,6 @@ class CoreTest extends AnyFlatSpec with ChiselScalatestTester {
1010
dut.io.debug_memory_write_data.poke(1.U(8.W));
1111

1212
dut.clock.step(1);
13-
14-
dut.io.debug_dispatcher_thread_requesting_opcode.poke(true.B);
15-
dut.io.debug_dispatcher_thread_program_pointer.poke(0.U(8.W));
1613

1714
dut.clock.step(1);
1815

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