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clang/test/CodeGen/AArch64/neon/fullfp16.c
@@ -36,7 +36,7 @@
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//===------------------------------------------------------===//
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// 2.5.2.1. Bitwise equal to zero
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-// LLVM-LABEL: test_vceqzh_f16
+// ALL-LABEL: test_vceqzh_f16
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uint16_t test_vceqzh_f16(float16_t a) {
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// CIR: [[C_0:%.*]] = cir.const #cir.fp<0.000000e+00>
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// CIR: [[CMP:%.*]] = cir.cmp eq %{{.*}}, [[C_0]] : !cir.f16
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