refactoring: still on the way

Author: EvilLord666

ISA_Camac_Interface/docs/chips_modules_test/IC8216_2.png

@@ -21,25 +21,33 @@
 
 module IC82x6 #
 (
-    INVERTED_OUTPUT = 0
+    parameter INVERTED_OUTPUT = 0
 )
 (
     input wire [3:0] d_in,
-    output wire [3:0] d_out,
+    output reg [3:0] d_out,
     inout wire [3:0] d_bus,
     input wire cs_n,
     input wire dce
 );
 
 
-wire [3:0] d_out_value;
-wire [3:0] d_bus_value;
+reg [3:0] d_bus_reg;
+assign d_bus = cs_n == 1'b0 ? ((dce== 1'b0) ? d_bus_reg : d_bus) : 4'bz;
 
-
-assign d_out_value = cs_n == 1'b0 && dce == 1'b1 ? d_bus : 4'b0;
-assign d_out = INVERTED_OUTPUT == 1 ? ~d_out_value : d_out_value;
-
-assign d_bus_value = INVERTED_OUTPUT == 1 ? ~d_in : d_in;
-assign d_bus = cs_n == 1'b0 && dce == 1'b0 ? d_bus_value : 4'bz;
+always @(*)
+begin
+   if (cs_n == 1'b1)                                                             // chip is OFF
+	begin
+	    d_out <= 4'bz;
+		 d_bus_reg <= 4'bz;
+	end
+	else                                                                          // chip is ON
+	begin
+       if (dce == 1'b0)                                                          // READ: d_in -> d_bus
+		     d_bus_reg <= INVERTED_OUTPUT == 0 ? d_in : 15 - d_in;    
+       else d_out <= INVERTED_OUTPUT == 0 ? d_bus_reg : 15  - d_bus_reg;         // WRITE: d_bus -> d_out via register
+	end
+end
 
 endmodule

ISA_Camac_Interface/sm2201_interface_board/lib/IC82x6.v

@@ -22,7 +22,7 @@
 
 module SN74LS257 #
 (
-    INVERTED_OUTPUT = 0
+    parameter INVERTED_OUTPUT = 0
 )
 (
     input wire [3:0] a,
@@ -36,5 +36,5 @@ module SN74LS257 #
     assign selection = select == 0 ? a : b;
     assign internal_out = INVERTED_OUTPUT == 0 ? selection : 15 - selection;
 
-    assign y = out_control == 0 ? internal_out : 'bz;
+    assign y = out_control == 0 ? internal_out : 4'b0000;
 endmodule

ISA_Camac_Interface/sm2201_interface_board/lib/SN74LS257.v

@@ -22,7 +22,7 @@
 
 module SN74LS365 #
 (
-    INVERTED_OUTPUT = 0
+    parameter INVERTED_OUTPUT = 0
 )
 (
     input wire e1,