Skip to content

Commit bf81795

Browse files
authored
Merge pull request #59 from MultiSimOLab/presolver
Adds a presolver function to staggered model
2 parents 9bbe9b2 + fed3722 commit bf81795

2 files changed

Lines changed: 9 additions & 7 deletions

File tree

src/ComputationalModels/Drivers.jl

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ end
4242

4343
function solve!(m::StaggeredModel;
4444
stepping=(nsteps=20, nsubsteps=1 , maxbisec=15),
45+
presolver=(τ,∆τ)->nothing,
4546
kargsolve)
4647

4748
nsubsteps=stepping[:nsubsteps]
@@ -52,14 +53,15 @@ function solve!(m::StaggeredModel;
5253
map((x, y) -> TrialFESpace!(x.fe_space, y.dirichlet, 0.0), m.state⁻, m.compmodels)
5354

5455
flagconv = 1 # convergence flag 0 (max bisections) 1 (max steps)
55-
Λ = 1.0 / nsteps
56-
for time in 0:nsteps-1
56+
τ = 1.0 / nsteps
57+
for τ in 0:nsteps-1
5758
println("*******************************************")
58-
println(" Staggered Step: $time ")
59+
println(" Staggered Step: $τ ")
5960
println("*******************************************")
60-
stevol(Λ) = ∆Λ *+ time)
61+
presolver(τ,∆τ)
62+
stevol(Λ) = ∆τ *+ τ)
6163
map(x -> updateBC!(x.dirichlet, x.dirichlet.caches, [stevol for _ in 1:length(x.dirichlet.caches)]), m.compmodels)
62-
for Λ_inner in 1:nsubsteps
64+
for τ_inner in 1:nsubsteps
6365
map((x) -> TrialFESpace!(x.spaces[1], x.dirichlet, 1.0), m.compmodels)
6466
_, flagconv = map((x, y) -> solve!(x; y...), m.compmodels, kargsolve)
6567
map((x, y) -> TrialFESpace!(x.fe_space, y.dirichlet, 1.0), m.state⁻, m.compmodels)
@@ -120,7 +122,7 @@ get_assemblers(m::StaticNonlinearModel) = (m.caches[4])
120122
# vtk::WriteVTK.CollectionFile=paraview_collection(datadir("sims", "Temp") * "/Results", append=false)
121123

122124
function solve!(m::StaticNonlinearModel;
123-
stepping=(nsteps=20, maxbisec=15), RestartState::Bool=false, ProjectDirichlet::Bool=true,
125+
stepping=(nsteps=20, maxbisec=15), RestartState::Bool=false, ProjectDirichlet::Bool=false,
124126
post=PostProcessor())
125127

126128
reset!(post)

test/data/StaticMechanicalDirichletSimulation.jl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ function static_mechanical_dirichlet_simulation(;writevtk=true, verbose=true)
7373
post_model = PostProcessor(comp_model, driverpost_mech; is_vtk=writevtk, filepath=simdir)
7474

7575
@timeit pname begin
76-
x, flag = solve!(comp_model; stepping=(nsteps=10, maxbisec=10), post=post_model)
76+
x, flag = solve!(comp_model; stepping=(nsteps=10, maxbisec=10), post=post_model,ProjectDirichlet=true)
7777
end
7878
return x
7979
end

0 commit comments

Comments
 (0)