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Fix unplugged controller memory writes, add some missing math routines, and slightly weaken DMA alignment requirements #117

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Merged
Mr-Wiseguy merged 3 commits into from
Jun 30, 2025
Merged

Fix unplugged controller memory writes, add some missing math routines, and slightly weaken DMA alignment requirements #117

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88e48bd
add back dkr math routines
LittleCube-hax Jun 24, 2025
9770110
dkr fixes
LittleCube-hax Jun 27, 2025
17afeae
Fix unplugged controller members being written to
Mr-Wiseguy Jun 30, 2025
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10 changes: 6 additions & 4 deletions librecomp/src/cont.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -50,10 +50,12 @@ extern "C" void osContGetReadData_recomp(uint8_t* rdram, recomp_context* ctx) {
osContGetReadData(dummy_data);

for (int controller = 0; controller < MAXCONTROLLERS; controller++) {
MEM_H(6 * controller + 0, data) = dummy_data[controller].button;
MEM_B(6 * controller + 2, data) = dummy_data[controller].stick_x;
MEM_B(6 * controller + 3, data) = dummy_data[controller].stick_y;
MEM_B(6 * controller + 4, data) = dummy_data[controller].err_no;
if (dummy_data[controller].err_no == 0) {
MEM_H(6 * controller + 0, data) = dummy_data[controller].button;
MEM_B(6 * controller + 2, data) = dummy_data[controller].stick_x;
MEM_B(6 * controller + 3, data) = dummy_data[controller].stick_y;
MEM_B(6 * controller + 4, data) = dummy_data[controller].err_no;
}
}
}

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32 changes: 32 additions & 0 deletions librecomp/src/math_routines.cpp
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Expand Up @@ -80,3 +80,35 @@ extern "C" void __ull_to_f_recomp(uint8_t * rdram, recomp_context * ctx) {

ctx->f0.fl = ret;
}

extern "C" void __ull_rshift_recomp(uint8_t * rdram, recomp_context * ctx) {
uint64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
uint64_t b = (ctx->r6 << 32) | ((ctx->r7 << 0) & 0xFFFFFFFFu);
uint64_t ret = a >> b;

ctx->r2 = (int32_t)(ret >> 32);
ctx->r3 = (int32_t)(ret >> 0);
}

extern "C" void __ll_to_f_recomp(uint8_t * rdram, recomp_context * ctx) {
int64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
float ret = (float)a;

ctx->f0.fl = ret;
}

extern "C" void __f_to_ll_recomp(uint8_t * rdram, recomp_context * ctx) {
int64_t ret = (int64_t)ctx->f12.fl;

ctx->r2 = (int32_t)(ret >> 32);
ctx->r3 = (int32_t)(ret >> 0);
}

extern "C" void __ll_lshift_recomp(uint8_t * rdram, recomp_context * ctx) {
uint64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
uint64_t b = (ctx->r6 << 32) | ((ctx->r7 << 0) & 0xFFFFFFFFu);
uint64_t ret = a << b;

ctx->r2 = (int32_t)(ret >> 32);
ctx->r3 = (int32_t)(ret >> 0);
}
1 change: 0 additions & 1 deletion librecomp/src/pi.cpp
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Expand Up @@ -67,7 +67,6 @@ void recomp::do_rom_read(uint8_t* rdram, gpr ram_address, uint32_t physical_addr
// TODO handle misaligned DMA
assert((physical_addr & 0x1) == 0 && "Only PI DMA from aligned ROM addresses is currently supported");
assert((ram_address & 0x7) == 0 && "Only PI DMA to aligned RDRAM addresses is currently supported");
assert((num_bytes & 0x1) == 0 && "Only PI DMA with aligned sizes is currently supported");
uint8_t* rom_addr = rom.data() + physical_addr - recomp::rom_base;
for (size_t i = 0; i < num_bytes; i++) {
MEM_B(i, ram_address) = *rom_addr;
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