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kkyarlagaddanvidia-bfigg
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spi: tegra210-quad: set half duplex flag
BugLink: https://bugs.launchpad.net/bugs/2024857 Tegra QSPI controller only supports half duplex transfers. Set half duplex constrain flag. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20230223162635.19747-3-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> (cherry picked from commit f7482d8) Acked-by: Jamie Nguyen <jamien@nvidia.com> Acked-by: Brad Figg <bfigg@nvidia.com> Acked-by: Ian May <ian.may@canonical.com> Acked-by: Jacob Martin <jacob.martin@canonical.com> Signed-off-by: Brad Figg <bfigg@nvidia.com>
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drivers/spi/spi-tegra210-quad.c

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@@ -1550,6 +1550,7 @@ static int tegra_qspi_probe(struct platform_device *pdev)
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master->mode_bits = SPI_MODE_0 | SPI_MODE_3 | SPI_CS_HIGH |
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SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD;
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master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->setup = tegra_qspi_setup;
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master->transfer_one_message = tegra_qspi_transfer_one_message;
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master->num_chipselect = 1;

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