Fix coverity issues (#3679)

szalpal · web-flow · commit 8d451d8c5394 · 2022-03-02T00:00:15.000+01:00
* Fix coverity issues

Signed-off-by: szalpal &lt;mszolucha@nvidia.com&gt;
diff --git a/dali/pipeline/data/tensor_list.h b/dali/pipeline/data/tensor_list.h
@@ -755,7 +755,7 @@ class DLL_PUBLIC TensorList {
   }
 
  protected:
-  Buffer<Backend> data_;
+  Buffer<Backend> data_ = {};
   // We store a set of dimension for each tensor in the list.
   // We also pre-compute the offsets of each tensor in the
   // underlying allocation for random access
diff --git a/dali/test/dali_test_utils.cc b/dali/test/dali_test_utils.cc
@@ -67,7 +67,7 @@ void MakeRandomBatch(TensorList<CPUBackend> &data, int N,
   }
 }
 
-void CheckResults(DeviceWorkspace ws, int batch_size, int i,
+void CheckResults(const DeviceWorkspace& ws, int batch_size, int i,
                   TensorList<CPUBackend> &data, int output_idx) {
   TensorList<CPUBackend> res_cpu;
   if (ws.OutputIsType<GPUBackend>(output_idx)) {
diff --git a/dali/test/dali_test_utils.h b/dali/test/dali_test_utils.h
@@ -57,7 +57,7 @@ void MakeRandomBatch(TensorList<CPUBackend> &data, int N,
  *             the end.
  * @param output_idx Index of the output in the workspace
  */
-void CheckResults(DeviceWorkspace ws, int batch_size, int i,
+void CheckResults(const DeviceWorkspace& ws, int batch_size, int i,
                   TensorList<CPUBackend> &data, int output_idx = 0);
 
 }  // namespace test

Original file line number	Diff line number	Diff line change
`@@ -755,7 +755,7 @@ class DLL_PUBLIC TensorList {`
`755`	`755`	`}`
`756`	`756`
`757`	`757`	`protected:`
`758`		`- Buffer<Backend> data_;`
	`758`	`+ Buffer<Backend> data_ = {};`
`759`	`759`	`// We store a set of dimension for each tensor in the list.`
`760`	`760`	`// We also pre-compute the offsets of each tensor in the`
`761`	`761`	`// underlying allocation for random access`
Original file line number	Diff line number	Diff line change
`@@ -67,7 +67,7 @@ void MakeRandomBatch(TensorList<CPUBackend> &data, int N,`
`67`	`67`	`}`
`68`	`68`	`}`
`69`	`69`
`70`		`-void CheckResults(DeviceWorkspace ws, int batch_size, int i,`
	`70`	`+void CheckResults(const DeviceWorkspace& ws, int batch_size, int i,`
`71`	`71`	`TensorList<CPUBackend> &data, int output_idx) {`
`72`	`72`	`TensorList<CPUBackend> res_cpu;`
`73`	`73`	`if (ws.OutputIsType<GPUBackend>(output_idx)) {`