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Vidya Sagarjacobmartin0
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PCI/CXL: Hide SBR from reset_methods if masked by CXL
BugLink: https://bugs.launchpad.net/bugs/2154302 Per CXL r3.1, sec 8.1.5.2, the Secondary Bus Reset (SBR) bit in the Bridge Control register of a CXL port has no effect unless the "Unmask SBR" bit in the Port Control Extensions Register is set. After b1956e2 ("PCI/CXL: Fail bus reset if upstream CXL Port has SBR masked"), Linux checks the "Unmask SBR" bit in pci_reset_bus_function(). But when probe==true, it previously returned 0, incorrectly indicating that SBR is a viable reset method for the device. As a result, "bus" is listed in the device's "reset_method" attribute even though the hardware is incapable of performing it. If a user writes "bus" to "reset_method" or triggers a reset that falls back to SBR, the operation fails with "write error: Inappropriate ioctl for device". If the link is operating in CXL mode (pcie_is_cxl()), return -ENOTTY immediately unless "Unmask SBR" is set, regardless of the probe argument. This ensures that "bus" is not advertised in "reset_methods" when the hardware prevents it, improving clarity for users and aligning the sysfs capability report with actual hardware behavior. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> [bhelgaas: commit log, use pcie_is_cxl()] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://patch.msgid.link/20260225133801.30231-1-vidyas@nvidia.com (cherry picked from commit 702c1d5) Signed-off-by: Matthew R. Ochs <mochs@nvidia.com> Acked-by: Jamie Nguyen <jamien@nvidia.com> Acked-by: Lee Trager <ltrager@nvidia.com> Acked-by: Carol L Soto <csoto@nvidia.com> Signed-off-by: Brad Figg <bfigg@nvidia.com>
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drivers/pci/pci.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5105,12 +5105,8 @@ static int pci_reset_bus_function(struct pci_dev *dev, bool probe)
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* If "dev" is below a CXL port that has SBR control masked, SBR
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* won't do anything, so return error.
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*/
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if (bridge && cxl_sbr_masked(bridge)) {
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if (probe)
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return 0;
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if (bridge && pcie_is_cxl(bridge) && cxl_sbr_masked(bridge))
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return -ENOTTY;
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}
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rc = pci_dev_reset_slot_function(dev, probe);
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if (rc != -ENOTTY)

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