NVIDIA: SAUCE: iommu/arm-smmu-v3: Use device ID range for DGX Spark iGPU iommu quirk

BugLink: https://bugs.launchpad.net/bugs/2150487

Replace the explicit DGX Spark iGPU device ID list with a range check
covering 0x2E00-0x2E3F to accommodate all possible DGX Spark iGPU PCI
device IDs without requiring individual additions.

The original quirk was introduced in
commit ab85863 ("NVIDIA: SAUCE: iommu/arm-smmu-v3:
Set DGX Spark iGPU default domain type to DMA") and
extended with two more IDs in
commit 8dc61ab ("NVIDIA: SAUCE: iommu/arm-smmu-v3:
Add two more DGX Spark iGPU IDs for existing iommu quirk").
Using a range avoids further per-ID additions as new DGX Spark
variants are introduced.

Signed-off-by: Abhishek Sahu <abhsahu@nvidia.com>
Acked-by: Jamie Nguyen <jamien@nvidia.com>
Acked-by: Matthew R. Ochs <mochs@nvidia.com>
Acked-by: Nirmoy Das <nirmoyd@nvidia.com>
Signed-off-by: Brad Figg <bfigg@nvidia.com>

Author: abhsahu

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

@@ -3788,8 +3788,7 @@ static int arm_smmu_def_domain_type(struct device *dev)
 			return IOMMU_DOMAIN_IDENTITY;
 
 		if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
-		    (pdev->device == 0x2E12 || pdev->device == 0x2E2A ||
-		     pdev->device == 0x2E2B))
+		    pdev->device >= 0x2E00 && pdev->device <= 0x2E3F)
 			return IOMMU_DOMAIN_DMA;
 	}