NVIDIA: VR: SAUCE: [Config] Add PCI_CXL annotation for CXL state save/restore

BugLink: https://bugs.launchpad.net/bugs/2143032

Add Ubuntu kernel config annotation for CONFIG_PCI_CXL introduced by
the CXL DVSEC and HDM state save/restore series (Srirangan Madhavan).

CONFIG_PCI_CXL:  Hidden bool in drivers/pci/Kconfig; auto-enabled when
                 CXL_BUS=y. Gates compilation of drivers/pci/cxl.o which
                 saves and restores CXL DVSEC control/range registers and
                 HDM decoder state across PCI resets and link transitions.

Signed-off-by: Jiandi An <jan@nvidia.com>
Acked-by: Jamie Nguyen <jamien@nvidia.com>
Acked-by: Nirmoy Das <nirmoyd@nvidia.com>
Acked-by: Carol L Soto <csoto@nvidia.com>
Acked-by: Matthew R. Ochs <mochs@nvidia.com>
Signed-off-by: Brad Figg <bfigg@nvidia.com>

Author: JiandiAnNVIDIA

debian.nvidia-6.17/config/annotations

@@ -249,6 +249,8 @@ CONFIG_GENERIC_CPU_CACHE_MAINTENANCE            note<'Selected by arm64 via arch
 CONFIG_CACHEMAINT_FOR_HOTPLUG                   policy<{'amd64': '-', 'arm64': 'n'}>
 CONFIG_CACHEMAINT_FOR_HOTPLUG                   note<'Optional HiSilicon HHA cache maintenance driver; depends on GENERIC_CPU_CACHE_MAINTENANCE; not needed for NVIDIA platforms'>
 
+CONFIG_PCI_CXL                                  policy<{'amd64': 'y', 'arm64': 'y'}>
+CONFIG_PCI_CXL                                  note<'Hidden bool; auto-enabled by CXL_BUS; PCI core CXL DVSEC and HDM state save/restore support'>
 
 # ---- Annotations without notes ----