[None][refactor] Drop batched pos-embed kernel and prune vLLM references

Stripped layer of commit 7368e5b after measurement showed the batched
single-launch kernel did not move the conc=64 throughput needle and added
non-trivial setup cost (5 small H->D copies for per-image metadata) on
the low-concurrency path.

* Vision pos-embed interpolation goes back to the per-image Triton
  kernel ``_triton_pos_embed_interpolate`` + ``torch.cat`` join in
  ``Qwen3VisionModel.fast_pos_embed_interpolate``. The kernel takes
  ``(h, w, h_scale, w_scale)`` as scalar args, so no H<->D metadata
  transfers happen on the hot path. The batched
  ``_bilinear_pos_embed_batched_kernel`` /
  ``_triton_pos_embed_interpolate_batched`` pair is removed.

* Vision rotary cache no longer hard-codes ``max_rope_seqlen = 8192``;
  ``Qwen3VisionModel.__init__`` now constructs a standard
  ``RotaryEmbedding`` whose ``rotary_cos_sin`` buffer is sized to
  ``text_config.max_position_embeddings`` via ``RopeParams.from_config``.
  ``_rotary_pos_emb_thw`` slices ``self.rotary_pos_emb.rotary_cos_sin
  [:max(h, w)]`` then indexes with ``pos_ids``, mirroring upstream/main.

* Removed vLLM cross-reference comments in modeling_qwen3vl.py,
  modeling_qwen2vl.py, and modules/rotary_embedding.py while keeping
  the local technical descriptions intact.

* Updated unit tests to mock ``rotary_pos_emb.rotary_cos_sin`` (the new
  buffer location) and dropped the batched-vs-per-image comparison
  test together with the batched kernel.

3-run aiperf sweep (conc=64, ISL=1000, OSL=100, warmup=20, single
512x512 image, Qwen3-VL-8B): throughput 18.01 +/- 0.94 req/s vs main
17.25 +/- 0.72 (+4.4%), TTFT 1082 +/- 107 ms vs 1240 +/- 137 (-12.7%),
latency 3528 +/- 178 ms vs 3692 +/- 149 (-4.4%).

Signed-off-by: yechank <161688079+yechank-nvidia@users.noreply.github.com>

Author: yechank-nvidia

tensorrt_llm/_torch/models/modeling_qwen2vl.py

@@ -773,12 +773,11 @@ def forward(
         position_embeddings: Optional[Tuple[torch.Tensor, torch.Tensor]] = None,
         **kwargs,
     ) -> torch.Tensor:
-        # vLLM-style residual fusion: collapse the post-attn residual add
-        # into ``norm2``'s residual path (``RMSNorm.forward`` with ``residual=``
-        # uses the FlashInfer ``fused_add_rmsnorm`` kernel). Saves one
-        # ``add<c10::BFloat16>`` launch per vision block (= 32 launches per
-        # executor iter at full-batch). Mirrors
-        # ``vllm/model_executor/models/qwen2_5_vl.py::Qwen2_5_VisionBlock``.
+        # Collapse the post-attn residual add into ``norm2``'s residual path
+        # (``RMSNorm.forward`` with ``residual=`` uses the FlashInfer
+        # ``fused_add_rmsnorm`` kernel). Saves one ``add<c10::BFloat16>``
+        # launch per vision block (= 32 launches per executor iter at
+        # full-batch).
         x_attn = self.attn(
             hidden_states=self.norm1(hidden_states),
             attn_metadata=attn_metadata,
@@ -951,9 +950,9 @@ def get_rope_and_window_index_by_thw(
     ) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor, Tuple[int, ...]]:
         """GPU (cos_thw, sin_thw); CPU (window_index_thw, seq_lens_thw).
 
-        Cached per ``(t, h, w)``. Mirrors vLLM's ``get_rope_by_thw`` pattern:
-        pos_ids and window_index are built on CPU, then moved to device once
-        per unique tile. The gather (``cos[pos_ids]``) and window reorder
+        Cached per ``(t, h, w)``. pos_ids and window_index are built on CPU,
+        then moved to device once per unique tile. The gather
+        (``cos[pos_ids]``) and window reorder
         (``cos_thw[window_index_thw_dev]``) run on device, so the cached
         cos/sin tensors are already-on-device -- ``forward``'s ``torch.cat``
         on them is a device-side cat with no H->D transfer. ``window_index``
@@ -978,13 +977,6 @@ def get_rope_and_window_index_by_thw(
         bytes fp32). Typical production VLM serving has 10-30 unique tile
         shapes, so the cache settles around 10-20 MB. ``maxsize=1024`` is
         a safety cap; reaching it requires >1024 distinct (t, h, w).
-
-        Note: vLLM's equivalent ``get_rope_by_thw`` casts the rotary
-        cos_sin_cache to the model dtype (bf16) via ``get_rope(dtype=torch.
-        get_default_dtype())`` -- so the equivalent vLLM cache is half the
-        size (320 B/token, ~5-10 MB production). ``RopeParams.create_rope_
-        const_params`` hardcodes fp32; switching to model dtype would halve
-        this footprint but is a separate change.
         """
         hpos_ids = torch.arange(h, dtype=torch.long).unsqueeze(1).expand(-1, w)
         wpos_ids = torch.arange(w, dtype=torch.long).unsqueeze(0).expand(h, -1)
@@ -1031,9 +1023,8 @@ def get_rope_and_window_index_by_thw(
             -1, sin_thw.shape[-1])
 
         # Cast once (per cached (t, h, w)) to the vision-tower dtype so the
-        # per-block ``cos.to(dtype=q.dtype)`` cast in ``apply_rope`` becomes a
-        # no-op. Mirrors vLLM's ``get_rope_by_thw`` which builds the rotary
-        # cache directly in the model dtype (see note above).
+        # per-block ``cos.to(dtype=q.dtype)`` cast in ``apply_rope`` becomes
+        # a no-op on the hot path.
         target_dtype = (
             self.model_config.pretrained_config.vision_config.torch_dtype
             if hasattr(self.model_config.pretrained_config.vision_config,