[None][ci] tighten VisualGen CBTS routing by zhenhuaw-me · Pull Request #15259 · NVIDIA/TensorRT-LLM

zhenhuaw-me · 2026-06-11T09:48:49Z

Description

Move remaining public VisualGen config imports to tensorrt_llm.visual_gen.args so _torch.visual_gen.config stays internal.
Keep tensorrt_llm/visual_gen/ as outward-facing in CBTS: public API edits fall back to baseline coverage, while internal _torch/visual_gen source edits narrow to VisualGen blocks.
Move scheduled VisualGen example tests and LPIPS golden data under tests/integration/defs/examples/visual_gen/, and move the media encoding unit test under tests/unittest/visual_gen/.
Update test-db and waive references from examples/test_visual_gen*.py and unittest/media/test_encoding.py to the new dedicated VisualGen test paths.
Keep VisualGen perf sanity in tests/integration/defs/perf/; VisualGenRule matches the shared visual_gen/ namespace plus the explicit perf/test_visual_gen_perf_sanity.py entry.

Test Coverage

git commit --amend -s pre-commit hooks, including commit-message DCO check, Ruff, YAML checks, test-list validation, and waive duplication checks.
PYTHONPYCACHEPREFIX=/tmp/codex_pycache python3 -m py_compile tests/integration/defs/examples/visual_gen/test_visual_gen.py tests/integration/defs/examples/visual_gen/test_visual_gen_multi_gpu.py tests/integration/defs/perf/test_visual_gen_perf_sanity.py tests/integration/defs/perf/visual_gen_perf_utils.py jenkins/scripts/cbts/rules/visual_gen_rule.py.
Static CBTS object check: internal VG source -> visualgenonly with 11 blocks / 29 stages; public tensorrt_llm/visual_gen -> baseline fallback; example and media test defs -> testdefonly; perf sanity test -> 1 perf block.
Exact YAML-target check found 76 VG entries and 0 legacy entries for the old example, media, top-level VisualGen, or perf/visual_gen test paths.
No pytest execution on the VM control-plane session.

zhenhuaw-me · 2026-06-11T09:52:54Z

/bot run

coderabbitai · 2026-06-11T09:57:11Z

📝 Walkthrough

Walkthrough

This PR relocates VisualGen configuration classes from an internal _torch module to a public visual_gen.args module and updates the CI narrowing rule definitions to detect outward-facing changes via prefix matching instead of fixed file lists. The change affects benchmark code, utilities, and test imports across the codebase.

Changes

VisualGen Import Path Consolidation

Layer / File(s)	Summary
CI Rule Definition and Documentation Updates `jenkins/scripts/cbts/rules/README.md`, `jenkins/scripts/cbts/rules/visual_gen_rule.py`	VisualGenRule's outward-facing detection shifts from a fixed file-list check (`_VG_OUTWARD_FILES`) to prefix-based matching (`_VG_OUTWARD_PREFIXES`) targeting `tensorrt_llm/visual_gen/`. Stable path families are redefined to include `visual_gen/...`, specific test scripts, and perf/media tests. Documentation and implementation are aligned with the new prefix-based mechanism.
Configuration Import Migration Across Codebase `tensorrt_llm/bench/benchmark/visual_gen.py`, `tensorrt_llm/commands/utils.py`, `tests/integration/defs/examples/test_visual_gen_multi_gpu.py`, `tests/unittest/_torch/visual_gen/multi_gpu/test_tp_attention.py`, `tests/unittest/_torch/visual_gen/test_cosmos3_transformer.py`, `tests/unittest/_torch/visual_gen/test_qwen_image_registry.py`	Imports of `VisualGenArgs`, `ParallelConfig`, and `AttentionConfig` are rewired from `tensorrt_llm._torch.visual_gen.config` to `tensorrt_llm.visual_gen.args` across benchmark, utility, integration test, and unit test modules. Import statements are reformatted for clarity where applicable.

🎯 2 (Simple) | ⏱️ ~10 minutes

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Docstring Coverage	⚠️ Warning	Docstring coverage is 66.67% which is insufficient. The required threshold is 80.00%.	Write docstrings for the functions missing them to satisfy the coverage threshold.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title accurately summarizes the main change: tightening VisualGen CBTS routing by moving imports and updating CI behavior.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Description check	✅ Passed	PR description covers objectives, implementation, and test coverage; follows most template guidelines but lacks explicit PR title format and API label documentation.

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✨ Finishing Touches

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tensorrt-cicd · 2026-06-11T09:59:20Z

PR_Github #53547 [ run ] triggered by Bot. Commit: cf9a25a Link to invocation

Move remaining public VisualGen config imports to the public args module so _torch.visual_gen.config stays internal to VisualGen. Place scheduled VisualGen example tests and golden data under examples/visual_gen, move the media unit test under unittest/visual_gen, and update test-db plus waive references to those paths. Keep VisualGen perf sanity with the shared perf tests. Match VG CBTS blocks by the shared visual_gen namespace plus the perf-sanity entry, and keep public tensorrt_llm/visual_gen changes on baseline fallback. Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>

zhenhuaw-me · 2026-06-11T10:45:13Z

/bot kill

zhenhuaw-me · 2026-06-11T10:45:54Z

/bot run

tensorrt-cicd · 2026-06-11T10:52:14Z

PR_Github #53558 [ kill ] triggered by Bot. Commit: 4af40c0 Link to invocation

tensorrt-cicd · 2026-06-11T10:52:42Z

PR_Github #53557 [ run ] triggered by Bot. Commit: 4af40c0 Link to invocation

tensorrt-cicd · 2026-06-11T10:52:48Z

PR_Github #53558 [ kill ] completed with state ABORTED. Commit: 4af40c0

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tensorrt-cicd · 2026-06-11T10:53:00Z

PR_Github #53547 [ run ] completed with state ABORTED. Commit: cf9a25a

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zhenhuaw-me · 2026-06-11T10:53:42Z

/bot run

tensorrt-cicd · 2026-06-11T10:59:21Z

PR_Github #53560 [ run ] triggered by Bot. Commit: 4af40c0 Link to invocation

zhenhuaw-me · 2026-06-16T01:41:08Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-06-16T01:47:09Z

PR_Github #54404 [ run ] triggered by Bot. Commit: 78bb8fe Link to invocation

tensorrt-cicd · 2026-06-16T07:48:06Z

PR_Github #54404 [ run ] completed with state SUCCESS. Commit: 78bb8fe
/LLM/main/L0_MergeRequest_PR pipeline #43477 completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

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zhenhuaw-me · 2026-06-16T12:55:55Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-06-16T13:02:13Z

PR_Github #54592 [ run ] triggered by Bot. Commit: 78bb8fe Link to invocation

tensorrt-cicd · 2026-06-16T18:57:39Z

PR_Github #54592 [ run ] completed with state SUCCESS. Commit: 78bb8fe
/LLM/main/L0_MergeRequest_PR pipeline #43633 completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

Please check the failed tests and fix your PR
If you cannot view the failures, ask the CI triggerer to share details
Once fixed, request an NVIDIA team member to trigger CI again

Link to invocation

zhenhuaw-me · 2026-06-17T03:09:17Z

/bot run --disable-fail-fast

tensorrt-cicd · 2026-06-17T03:14:40Z

PR_Github #54734 [ run ] triggered by Bot. Commit: 78bb8fe Link to invocation

tensorrt-cicd · 2026-06-17T05:03:40Z

PR_Github #54734 [ run ] completed with state SUCCESS. Commit: 78bb8fe
/LLM/main/L0_MergeRequest_PR pipeline #43761 completed with status: 'SUCCESS'

CI Report

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Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>

zhenhuaw-me · 2026-06-17T06:36:53Z

/bot run --stage-list "A10-PyTorch-1"

tensorrt-cicd · 2026-06-17T06:42:41Z

PR_Github #54778 [ run ] triggered by Bot. Commit: aaf810a Link to invocation

tensorrt-cicd · 2026-06-17T09:02:00Z

PR_Github #54778 [ run ] completed with state SUCCESS. Commit: aaf810a
/LLM/main/L0_MergeRequest_PR pipeline #43796 (Partly Tested) completed with status: 'SUCCESS'

CI Report

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zhenhuaw-me · 2026-06-17T09:53:21Z

/bot skip --comment "Minimal-stage CI validation (A10-PyTorch-1, PR_Github #54778) passed: 'Check Test List' Jenkins stage + CBTS rule eval + 4 VG unit tests incl. moved test_media_encoding.py all green ('L0 Pipeline (Partly Tested) SUCCESS'). Full L0 matrix bypassed; 2 prior --disable-fail-fast runs (#43477 with 5991/2/852, #43633 with 38751/4/13917) showed only pre-existing main-branch flakes with zero overlap with PR diff: multi_gpu wrapper kill 20.2%, TestNanoV3Omni 8%, TestQwen3_5_4B 5.8%, qwen_moe_routed_expert 19-27%, TestLTX2AVUlysses 0.2% (collateral of multi_gpu wrapper). PR diff is CBTS routing rule + import-path cleanup + VG test file moves — review-by-inspection."

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>

zhenhuaw-me · 2026-06-17T10:55:08Z

/bot run --stage-list "A10-PyTorch-1"

tensorrt-cicd · 2026-06-17T11:02:13Z

PR_Github #54839 [ run ] triggered by Bot. Commit: c3f6147 Link to invocation

zhenhuaw-me · 2026-06-17T13:03:43Z

/bot skip --comment "1 waive diff only after last success CI"

tensorrt-cicd · 2026-06-17T13:09:32Z

PR_Github #54850 [ ] completed with state FAILURE. Commit: ``

Link to invocation

tensorrt-cicd · 2026-06-17T13:23:03Z

PR_Github #54839 [ run ] completed with state SUCCESS. Commit: c3f6147
/LLM/main/L0_MergeRequest_PR pipeline #43851 (Partly Tested) completed with status: 'SUCCESS'

CI Report

Link to invocation

zhenhuaw-me · 2026-06-17T13:53:15Z

/bot skip --comment "Minimal-stage CI validation (A10-PyTorch-1, PR_Github #54839) passed: 'Check Test List' Jenkins stage + CBTS rule eval + 4 VG unit tests incl. moved test_media_encoding.py all green ('L0 Pipeline (Partly Tested) SUCCESS') on HEAD c3f6147. Full L0 matrix bypassed; 2 prior --disable-fail-fast runs (#43477 with 5991/2/852, #43633 with 38751/4/13917) showed only pre-existing main-branch flakes with zero overlap with PR diff: multi_gpu wrapper kill 20.2%, TestNanoV3Omni 8%, TestQwen3_5_4B 5.8%, qwen_moe_routed_expert 19-27%. PR diff is CBTS routing rule + import-path cleanup + VG test file moves — review-by-inspection."

tensorrt-cicd · 2026-06-17T13:58:56Z

PR_Github #54854 Bot args parsing error: Failed to parse bot args

Link to invocation

zhenhuaw-me · 2026-06-17T14:53:18Z

/bot skip --comment "Minimal-stage A10-PyTorch-1 cleared on HEAD c3f6147 (Check Test List + CBTS + 4 VG unit tests). Two prior runs on prior HEAD showed only pre-existing main flakes outside PR scope. PR diff is CBTS routing + import-path cleanup + VG test file moves; review-by-inspection."

tensorrt-cicd · 2026-06-17T14:59:07Z

PR_Github #54856 [ skip ] triggered by Bot. Commit: c3f6147 Link to invocation

tensorrt-cicd · 2026-06-17T15:10:40Z

PR_Github #54856 [ skip ] completed with state SUCCESS. Commit: c3f6147
Skipping testing for commit c3f6147

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Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com> Signed-off-by: GitLab CI Bot <gitlab-ci@nvidia.com>

github-actions Bot assigned zhenhuaw-me Jun 11, 2026

zhenhuaw-me added the VisualGen label Jun 11, 2026

zhenhuaw-me marked this pull request as ready for review June 11, 2026 09:52

zhenhuaw-me requested review from a team as code owners June 11, 2026 09:52

zhenhuaw-me requested review from FrankD412, dpitman-nvda, schetlur-nv and yiqingy0 June 11, 2026 09:52

zhenhuaw-me force-pushed the cbts-vg-config-import-cleanup branch from cf9a25a to 0badb45 Compare June 11, 2026 10:08

zhenhuaw-me requested a review from a team as a code owner June 11, 2026 10:08

zhenhuaw-me force-pushed the cbts-vg-config-import-cleanup branch 2 times, most recently from 25d409a to c779ed0 Compare June 11, 2026 10:36

zhenhuaw-me force-pushed the cbts-vg-config-import-cleanup branch from c779ed0 to 4af40c0 Compare June 11, 2026 10:39

zhenhuaw-me requested a review from QiJune June 11, 2026 10:45

Merge branch 'main' into cbts-vg-config-import-cleanup

aaf810a

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>

Merge branch 'main' into cbts-vg-config-import-cleanup

c3f6147

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com>

zhenhuaw-me enabled auto-merge (squash) June 17, 2026 13:04

zhenhuaw-me merged commit d202244 into NVIDIA:main Jun 17, 2026
8 checks passed

zhenhuaw-me deleted the cbts-vg-config-import-cleanup branch June 17, 2026 15:10

xinhe-nv pushed a commit to tensorrt-cicd/TensorRT-LLM that referenced this pull request Jun 23, 2026

[None][ci] tighten VisualGen CBTS routing (NVIDIA#15259)

81c6920

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com> Signed-off-by: GitLab CI Bot <gitlab-ci@nvidia.com>

xinhe-nv pushed a commit to tensorrt-cicd/TensorRT-LLM that referenced this pull request Jun 24, 2026

[None][ci] tighten VisualGen CBTS routing (NVIDIA#15259)

41d4310

Signed-off-by: Zhenhua Wang <zhenhuaw@nvidia.com> Signed-off-by: GitLab CI Bot <gitlab-ci@nvidia.com>

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Description

Test Coverage

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Walkthrough

Changes

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