610.43.02

Author: mmaneetsingh

README.md

@@ -1,7 +1,7 @@
 # NVIDIA Linux Open GPU Kernel Module Source
 
 This is the source release of the NVIDIA Linux open GPU kernel modules,
-version 595.71.05.
+version 610.43.02.
 
 
 ## How to Build
@@ -17,7 +17,7 @@ as root:
 
 Note that the kernel modules built here must be used with GSP
 firmware and user-space NVIDIA GPU driver components from a corresponding
-595.71.05 driver release.  This can be achieved by installing
+610.43.02 driver release.  This can be achieved by installing
 the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
 option.  E.g.,
 
@@ -185,7 +185,7 @@ table below).
 For details on feature support and limitations, see the NVIDIA GPU driver
 end user README here:
 
-https://us.download.nvidia.com/XFree86/Linux-x86_64/595.71.05/README/kernel_open.html
+https://us.download.nvidia.com/XFree86/Linux-x86_64/610.43.02/README/kernel_open.html
 
 For vGPU support, please refer to the README.vgpu packaged in the vGPU Host
 Package for more details.
@@ -1020,6 +1020,7 @@ Subsystem Device ID.
 | NVIDIA RTX PRO 500 Blackwell Embedded GPU               | 2DF9           |
 | NVIDIA GB10                                             | 2E12 10DE 21EC |
 | NVIDIA GeForce RTX 5070                                 | 2F04           |
+| NVIDIA GeForce RTX 5060                                 | 2F06           |
 | NVIDIA GeForce RTX 5070 Ti Laptop GPU                   | 2F18           |
 | NVIDIA RTX PRO 3000 Blackwell Generation Laptop GPU     | 2F38           |
 | NVIDIA GeForce RTX 5070 Ti Laptop GPU                   | 2F58           |

kernel-open/Kbuild

@@ -79,7 +79,7 @@ ccflags-y += -I$(src)/common/inc
 ccflags-y += -I$(src)
 ccflags-y += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
 ccflags-y += -D__KERNEL__ -DMODULE -DNVRM
-ccflags-y += -DNV_VERSION_STRING=\"595.71.05\"
+ccflags-y += -DNV_VERSION_STRING=\"610.43.02\"
 
 # Include and link Tegra out-of-tree modules.
 ifneq ($(wildcard /usr/src/nvidia/nvidia-public),)

kernel-open/common/inc/nv-firmware.h

@@ -34,8 +34,10 @@ typedef enum
     NV_FIRMWARE_TYPE_GSP,
     NV_FIRMWARE_TYPE_GSP_LOG,
 #if defined(NV_VMWARE)
-    NV_FIRMWARE_TYPE_BINDATA
+    // GR-3428: Merge _BINDATA and _UCODES
+    NV_FIRMWARE_TYPE_BINDATA,
 #endif
+    NV_FIRMWARE_TYPE_UCODES
 } nv_firmware_type_t;
 
 typedef enum
@@ -49,6 +51,7 @@ typedef enum
     NV_FIRMWARE_CHIP_FAMILY_GH100 = 6,
     NV_FIRMWARE_CHIP_FAMILY_GB10X = 8,
     NV_FIRMWARE_CHIP_FAMILY_GB20X = 9,
+    NV_FIRMWARE_CHIP_FAMILY_GR10X = 10,
     NV_FIRMWARE_CHIP_FAMILY_GB10Y = 11,
     NV_FIRMWARE_CHIP_FAMILY_GB20Y = 12,
     NV_FIRMWARE_CHIP_FAMILY_END,
@@ -59,6 +62,7 @@ static inline const char *nv_firmware_chip_family_to_string(
 )
 {
     switch (fw_chip_family) {
+        case NV_FIRMWARE_CHIP_FAMILY_GR10X: return "gr10x";
         case NV_FIRMWARE_CHIP_FAMILY_GB10X: return "gb10x";
         case NV_FIRMWARE_CHIP_FAMILY_GB10Y: return "gb10y";
         case NV_FIRMWARE_CHIP_FAMILY_GB20Y: return "gb20y";
@@ -79,7 +83,7 @@ static inline const char *nv_firmware_chip_family_to_string(
 
 // The includer may optionally define
 // NV_FIRMWARE_FOR_NAME(name)
-// to return a platform-defined string for a given a gsp_* or gsp_log_* name.
+// to return a platform-defined string for a given a firmware base name.
 //
 // The function nv_firmware_for_chip_family will then be available.
 #if defined(NV_FIRMWARE_FOR_NAME)
@@ -88,69 +92,64 @@ static inline const char *nv_firmware_for_chip_family(
     nv_firmware_chip_family_t fw_chip_family
 )
 {
-    if (fw_type == NV_FIRMWARE_TYPE_GSP)
+    switch (fw_chip_family)
     {
-        switch (fw_chip_family)
+        case NV_FIRMWARE_CHIP_FAMILY_GR10X:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GB10X:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GB10Y:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GB20Y:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GB20X:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GH100:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_AD10X:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_GA10X:
         {
-            case NV_FIRMWARE_CHIP_FAMILY_GB10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB10Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GH100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_AD10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GA10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_ga10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_GA100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU11X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_tu10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_NULL:
-                return "";
+            switch (fw_type)
+            {
+                case NV_FIRMWARE_TYPE_GSP:     return NV_FIRMWARE_FOR_NAME("gsp_ga10x");
+                case NV_FIRMWARE_TYPE_GSP_LOG: return NV_FIRMWARE_FOR_NAME("gsp_log_ga10x");
+#if defined(NV_VMWARE)
+                case NV_FIRMWARE_TYPE_BINDATA: return NV_FIRMWARE_FOR_NAME("bindata_image");
+#endif
+                case NV_FIRMWARE_TYPE_UCODES:  return NV_FIRMWARE_FOR_NAME("ucodes_ga10x");
+            }
+            return "";
         }
-    }
-    else if (fw_type == NV_FIRMWARE_TYPE_GSP_LOG)
-    {
-        switch (fw_chip_family)
-        {
-            case NV_FIRMWARE_CHIP_FAMILY_GB10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB10Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GH100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_AD10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GA10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_log_ga10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_GA100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU11X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_log_tu10x");
 
-            case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_NULL:
-                return "";
-        }
-    }
+        case NV_FIRMWARE_CHIP_FAMILY_GA100:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_TU11X:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_TU10X:
+        {
+            switch (fw_type)
+            {
+                case NV_FIRMWARE_TYPE_GSP:     return NV_FIRMWARE_FOR_NAME("gsp_tu10x");
+                case NV_FIRMWARE_TYPE_GSP_LOG: return NV_FIRMWARE_FOR_NAME("gsp_log_tu10x");
 #if defined(NV_VMWARE)
-    else if (fw_type == NV_FIRMWARE_TYPE_BINDATA)
-    {
-        return NV_FIRMWARE_FOR_NAME("bindata_image");
-    }
+                case NV_FIRMWARE_TYPE_BINDATA: return NV_FIRMWARE_FOR_NAME("bindata_image");
 #endif
+                case NV_FIRMWARE_TYPE_UCODES:  return NV_FIRMWARE_FOR_NAME("ucodes_tu10x");
+            }
+            return "";
+        }
+
+        case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
+        case NV_FIRMWARE_CHIP_FAMILY_NULL:
+            return "";
+    }
+
     return "";
 }
 #endif  // defined(NV_FIRMWARE_FOR_NAME)
 
 // The includer may optionally define
 // NV_FIRMWARE_DECLARE_GSP(name)
 // which will then be invoked (at the top-level) for each
-// gsp_* (but not gsp_log_*)
+// gsp_* and ucodes_* (but not gsp_log_*)
 #if defined(NV_FIRMWARE_DECLARE_GSP)
 NV_FIRMWARE_DECLARE_GSP("gsp_ga10x")
 NV_FIRMWARE_DECLARE_GSP("gsp_tu10x")
+NV_FIRMWARE_DECLARE_GSP("ucodes_ga10x")
+NV_FIRMWARE_DECLARE_GSP("ucodes_tu10x")
 #endif  // defined(NV_FIRMWARE_DECLARE_GSP)
 
 #endif  // NV_FIRMWARE_DECLARE_GSP
+

kernel-open/common/inc/nv-linux.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2001-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2001-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -231,16 +231,6 @@ NV_STATUS nvos_forward_error_to_cray(struct pci_dev *, NvU32,
 #include <asm/kgdb.h>
 #endif
 
-#if defined(NVCPU_X86_64) && !defined(NV_XEN_SUPPORT_FULLY_VIRTUALIZED_KERNEL)
-#define NV_ENABLE_PAT_SUPPORT
-#endif
-
-#define NV_PAT_MODE_DISABLED    0
-#define NV_PAT_MODE_KERNEL      1
-#define NV_PAT_MODE_BUILTIN     2
-
-extern int nv_pat_mode;
-
 #if defined(CONFIG_HOTPLUG_CPU)
 #define NV_ENABLE_HOTPLUG_CPU
 #include <linux/notifier.h>         /* struct notifier_block, etc       */
@@ -288,13 +278,7 @@ extern int nv_pat_mode;
 #if defined(NVCPU_AARCH64) || defined(NVCPU_RISCV64)
 #define NV_ALLOW_WRITE_COMBINING(mt)    1
 #elif defined(NVCPU_X86_64)
-#if defined(NV_ENABLE_PAT_SUPPORT)
-#define NV_ALLOW_WRITE_COMBINING(mt)    \
-    ((nv_pat_mode != NV_PAT_MODE_DISABLED) && \
-     ((mt) != NV_MEMORY_TYPE_REGISTERS))
-#else
-#define NV_ALLOW_WRITE_COMBINING(mt)    0
-#endif
+#define NV_ALLOW_WRITE_COMBINING(mt)    ((mt) != NV_MEMORY_TYPE_REGISTERS)
 #endif
 
 #define NV_MAX_RECURRING_WARNING_MESSAGES 10
@@ -949,18 +933,12 @@ typedef struct nv_alloc_s {
  * Starting with the 5.0 kernel, SWIOTLB is merged into
  * direct_dma, so systems without an IOMMU use direct_dma.  We
  * need to know if this is the case, so that we can use a
- * different check for SWIOTLB enablement.
+ * different check for SWIOTLB enablement. dma_is_direct()
+ * performs this same check.
  */
 static inline NvBool nv_is_dma_direct(struct device *dev)
 {
-    NvBool is_direct = NV_FALSE;
-
-#if defined(NV_DMA_IS_DIRECT_PRESENT)
-    if (dma_is_direct(get_dma_ops(dev)))
-        is_direct = NV_TRUE;
-#endif
-
-    return is_direct;
+    return get_dma_ops(dev) == NULL;
 }
 
 /**
@@ -1427,6 +1405,7 @@ typedef struct nv_linux_state_s {
     struct nv_pci_tegra_devfreq_dev *nvd_devfreq_dev;
     struct nv_pci_tegra_devfreq_dev *sys_devfreq_dev;
     struct nv_pci_tegra_devfreq_dev *pwr_devfreq_dev;
+    NvU32 tegra_suspend_freq;
 
     int (*devfreq_suspend)(struct device *dev);
     int (*devfreq_resume)(struct device *dev);
@@ -1604,6 +1583,7 @@ static inline NV_STATUS nv_check_gpu_state(nv_state_t *nv)
 }
 
 extern NvU32 NVreg_EnableUserNUMAManagement;
+extern NvU32 NVreg_OsEnableCxlSupport;
 extern NvU32 NVreg_RegisterPCIDriver;
 extern NvU32 NVreg_RegisterPlatformDeviceDriver;
 extern NvU32 NVreg_EnableResizableBar;

kernel-open/common/inc/nv-pci.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2019-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -39,4 +39,30 @@ nv_linux_state_t * find_pci(NvU32, NvU8, NvU8, NvU8);
 NvBool nv_pci_is_valid_topology_for_direct_pci(nv_state_t *, struct pci_dev *);
 NvBool nv_pci_has_common_pci_switch(nv_state_t *nv, struct pci_dev *);
 void nv_pci_tegra_boost_clocks(struct device *dev);
+
+/* Register Block Identifier (RBI) */
+enum cxl_regloc_type {
+    CXL_REGLOC_RBI_EMPTY = 0,
+    CXL_REGLOC_RBI_COMPONENT,
+    CXL_REGLOC_RBI_VIRT,
+    CXL_REGLOC_RBI_MEMDEV,
+    CXL_REGLOC_RBI_PMU,
+    CXL_REGLOC_RBI_TYPES
+};
+
+#define CXL_CM_OFFSET 0x1000
+#define CXL_CM_CAP_HDR_OFFSET 0x0
+#define CXL_CM_CAP_HDR_ID_MASK GENMASK(15, 0)
+#define CM_CAP_HDR_CAP_ID 1
+#define CXL_CM_CAP_HDR_ARRAY_SIZE_MASK GENMASK(31, 24)
+#define CXL_CM_CAP_PTR_MASK GENMASK(31, 20)
+#define CXL_CM_CAP_CAP_ID_HDM 0x5
+#define CXL_HDM_DECODER_CAP_OFFSET 0x0
+#define CXL_HDM_DECODER0_BASE_LOW_OFFSET(i) (0x20 * (i) + 0x10)
+#define CXL_HDM_DECODER0_BASE_HIGH_OFFSET(i) (0x20 * (i) + 0x14)
+#define CXL_HDM_DECODER0_SIZE_LOW_OFFSET(i) (0x20 * (i) + 0x18)
+#define CXL_HDM_DECODER0_SIZE_HIGH_OFFSET(i) (0x20 * (i) + 0x1c)
+#define CXL_HDM_DECODER0_CTRL_OFFSET(i) (0x20 * (i) + 0x20)
+#define CXL_HDM_DECODER0_CTRL_COMMITTED BIT(10)
+
 #endif

kernel-open/common/inc/nv-pgprot.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2015-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2015-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -31,31 +31,11 @@
 
 #if !defined(NV_VMWARE)
 #if defined(NVCPU_X86_64)
-/* mark memory UC-, rather than UC (don't use _PAGE_PWT) */
-static inline pgprot_t pgprot_noncached_weak(pgprot_t old_prot)
-    {
-        pgprot_t new_prot = old_prot;
-        if (boot_cpu_data.x86 > 3)
-            new_prot = __pgprot(pgprot_val(old_prot) | _PAGE_PCD);
-        return new_prot;
-    }
-
-#if !defined (pgprot_noncached)
-static inline pgprot_t pgprot_noncached(pgprot_t old_prot)
-    {
-        pgprot_t new_prot = old_prot;
-        if (boot_cpu_data.x86 > 3)
-            new_prot = __pgprot(pgprot_val(old_prot) | _PAGE_PCD | _PAGE_PWT);
-        return new_prot;
-    }
-#endif
 static inline pgprot_t pgprot_modify_writecombine(pgprot_t old_prot)
-    {
-        pgprot_t new_prot = old_prot;
-        pgprot_val(new_prot) &= ~(_PAGE_PSE | _PAGE_PCD | _PAGE_PWT);
-        new_prot = __pgprot(pgprot_val(new_prot) | _PAGE_PWT);
-        return new_prot;
-    }
+{
+    return __pgprot((pgprot_val(old_prot) & ~_PAGE_CACHE_MASK) |
+                    cachemode2protval(_PAGE_CACHE_MODE_WC));
+}
 #endif /* defined(NVCPU_X86_64) */
 #endif /* !defined(NV_VMWARE) */
 
@@ -68,6 +48,10 @@ extern NvBool nvos_is_chipset_io_coherent(void);
 #define NV_PGPROT_UNCACHED(old_prot)   \
      __pgprot_modify((old_prot), PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC))
 #else
+/*
+ * Note: the kernel's implementation of pgprot_noncached() on x86-64 evaluates to
+ *       UC- (noncached weak ordering) instead of strict UC.
+ */
 #define NV_PGPROT_UNCACHED(old_prot)          pgprot_noncached(old_prot)
 #endif
 
@@ -77,7 +61,7 @@ extern NvBool nvos_is_chipset_io_coherent(void);
 #define NV_PGPROT_READ_ONLY(old_prot)                                         \
             __pgprot_modify(old_prot, 0, PTE_RDONLY)
 #elif defined(NVCPU_X86_64)
-#define NV_PGPROT_UNCACHED_WEAK(old_prot)       pgprot_noncached_weak(old_prot)
+#define NV_PGPROT_UNCACHED_WEAK(old_prot)       pgprot_noncached(old_prot)
 #define NV_PGPROT_WRITE_COMBINED(old_prot)                                    \
     pgprot_modify_writecombine(old_prot)
 #define NV_PGPROT_READ_ONLY(old_prot)                                         \

kernel-open/common/inc/nv-proto.h

@@ -54,6 +54,8 @@ NV_STATUS   nv_alloc_contig_pages       (nv_state_t *, nv_alloc_t *);
 void        nv_free_contig_pages        (nv_alloc_t *);
 NV_STATUS   nv_alloc_system_pages       (nv_state_t *, nv_alloc_t *);
 void        nv_free_system_pages        (nv_alloc_t *);
+int         nv_init_page_pools          (void);
+void        nv_destroy_page_pools       (void);
 
 int         nv_uvm_init                 (void);
 void        nv_uvm_exit                 (void);
@@ -83,6 +85,9 @@ void          nvidia_modeset_probe             (const nv_linux_state_t *nvl);
 NvBool        nv_is_uuid_in_gpu_exclusion_list (const char *);
 
 NV_STATUS     nv_parse_per_device_option_string(nvidia_stack_t *sp);
+void          nv_enable_cdmm_mode(nvidia_stack_t *sp);
+NvBool        nv_is_galaxy_workstation         (void);
+
 nv_linux_state_t * find_uuid(const NvU8 *uuid);
 void          nv_report_error(struct pci_dev *dev, NvU32 error_number, const char *format, va_list ap);
 void          nv_shutdown_adapter(nvidia_stack_t *, nv_state_t *, nv_linux_state_t *);