Open-CMSIS-Pack · brondani · Mar 12, 2026 · Mar 12, 2026
diff --git a/libs/rteutils/include/RteConstants.h b/libs/rteutils/include/RteConstants.h
@@ -8,7 +8,7 @@
 */
 /******************************************************************************/
 /*
- * Copyright (c) 2020-2023 Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2026 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -153,19 +153,26 @@ class RteConstants
 
   static constexpr const char* YAML_ON = "on";
   static constexpr const char* YAML_OFF = "off";
+  static constexpr const char* YAML_PRESENT = "present";
+  static constexpr const char* YAML_NONE = "none";
   static constexpr const char* YAML_FPU_DP = "dp";
   static constexpr const char* YAML_FPU_SP = "sp";
   static constexpr const char* YAML_MVE_FP = "fp";
   static constexpr const char* YAML_MVE_INT = "int";
   static constexpr const char* YAML_ENDIAN_BIG = "big";
   static constexpr const char* YAML_ENDIAN_LITTLE = "little";
+  static constexpr const char* YAML_ENDIAN_CONFIG = "configurable";
   static constexpr const char* YAML_BP_BTI = "bti";
   static constexpr const char* YAML_BP_BTI_SIGNRET = "bti-signret";
   static constexpr const char* YAML_TZ_SECURE = "secure";
   static constexpr const char* YAML_TZ_SECURE_ONLY = "secure-only";
   static constexpr const char* YAML_TZ_NON_SECURE = "non-secure";
 
+  static constexpr const char* RTE_DCLOCK = "Dclock";
+  static constexpr const char* RTE_DCORE = "Dcore";
+  static constexpr const char* RTE_DCORE_VERSION = "DcoreVersion";
   static constexpr const char* RTE_DFPU = "Dfpu";
+  static constexpr const char* RTE_DMPU = "Dmpu";
   static constexpr const char* RTE_DDSP = "Ddsp";
   static constexpr const char* RTE_DMVE = "Dmve";
   static constexpr const char* RTE_DENDIAN = "Dendian";
@@ -174,9 +181,14 @@ class RteConstants
   static constexpr const char* RTE_DBRANCHPROT = "DbranchProt";
   static constexpr const char* RTE_DPACBTI = "Dpacbti";
 
+  static constexpr const char* RTE_PNAME = "Pname";
+  static constexpr const char* RTE_PUNITS = "Punits";
+
   static constexpr const char* RTE_DP_FPU = "DP_FPU";
   static constexpr const char* RTE_SP_FPU = "SP_FPU";
   static constexpr const char* RTE_NO_FPU = "NO_FPU";
+  static constexpr const char* RTE_MPU = "MPU";
+  static constexpr const char* RTE_NO_MPU = "NO_MPU";
   static constexpr const char* RTE_DSP = "DSP";
   static constexpr const char* RTE_NO_DSP = "NO_DSP";
   static constexpr const char* RTE_MVE = "MVE";
@@ -194,19 +206,22 @@ class RteConstants
   static constexpr const char* RTE_BTI = "BTI";
   static constexpr const char* RTE_BTI_SIGNRET = "BTI_SIGNRET";
   static constexpr const char* RTE_NO_BRANCHPROT = "NO_BRANCHPROT";
+  static constexpr const char* RTE_PACBTI = "PACBTI";
   static constexpr const char* RTE_NO_PACBTI = "NO_PACBTI";
 
   static const StrMap        DeviceAttributesKeys;
   static const StrPairVecMap DeviceAttributesValues;
+  static const StrPairVecMap ProcessorCapabilities;
 
   /**
    * @brief get equivalent device attribute
    * @param key device attribute rte key
    * @param value device attribute value (rte or yaml)
+   * @param map of device attributes/capabilities
    * @return rte or yaml equivalent device value
   */
-  static const std::string& GetDeviceAttribute(const std::string& key, const std::string& value);
-
+  static const std::string& GetDeviceAttribute(const std::string& key, const std::string& value,
+    const StrPairVecMap& attr = DeviceAttributesValues);
 };
 
 #endif // RteConstants_H
diff --git a/libs/rteutils/src/RteConstants.cpp b/libs/rteutils/src/RteConstants.cpp
@@ -6,7 +6,7 @@
 */
 /******************************************************************************/
 /*
- * Copyright (c) 2020-2024 Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2026 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -46,9 +46,29 @@ const StrPairVecMap RteConstants::DeviceAttributesValues = {
                       { RTE_NO_BRANCHPROT, YAML_OFF            }}},
 };
 
-const string& RteConstants::GetDeviceAttribute(const string& key, const string& value) {
-  auto it = DeviceAttributesValues.find(key);
-  if(it != DeviceAttributesValues.end()) {
+const StrPairVecMap RteConstants::ProcessorCapabilities = {
+  { RTE_DFPU       , {{ RTE_DP_FPU             , YAML_FPU_DP        },
+                      { RTE_SP_FPU             , YAML_FPU_SP        },
+                      { RTE_NO_FPU             , YAML_NONE          }}},
+  { RTE_DMPU       , {{ RTE_MPU                , YAML_PRESENT       },
+                      { RTE_NO_MPU             , YAML_NONE          }}},
+  { RTE_DDSP       , {{ RTE_DSP                , YAML_PRESENT       },
+                      { RTE_NO_DSP             , YAML_NONE          }}},
+  { RTE_DMVE       , {{ RTE_FP_MVE             , YAML_MVE_FP        },
+                      { RTE_MVE                , YAML_MVE_INT       },
+                      { RTE_NO_MVE             , YAML_NONE          }}},
+  { RTE_DENDIAN    , {{ RTE_ENDIAN_BIG         , YAML_ENDIAN_BIG    },
+                      { RTE_ENDIAN_LITTLE      , YAML_ENDIAN_LITTLE },
+                      { RTE_ENDIAN_CONFIGURABLE, YAML_ENDIAN_CONFIG }}},
+  { RTE_DTZ        , {{ RTE_TZ                 , YAML_PRESENT       },
+                      { RTE_NO_TZ              , YAML_NONE          }}},
+  { RTE_DPACBTI,     {{ RTE_PACBTI             , YAML_PRESENT       },
+                      { RTE_NO_PACBTI          , YAML_NONE          }}},
+};
+
+const string& RteConstants::GetDeviceAttribute(const string& key, const string& value, const StrPairVecMap& attr) {
+  auto it = attr.find(key);
+  if(it != attr.end()) {
     for(const auto& [rte, yaml] : it->second) {
       if(value == rte) {
         return yaml;

diff --git a/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc b/test/packs/ARM/RteTest_DFP/0.2.0/ARM.RteTest_DFP.pdsc
@@ -141,8 +141,10 @@
       </device>
 
       <device Dname="RteTest_ARMCM0_Dual">
-        <processor Pname="cm0_core0" Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000" />
-        <processor Pname="cm0_core1" Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
+        <processor Pname="cm0_core0" Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"
+          Ddsp="NO_DSP" Dtz="NO_TZ" Dmve="FP_MVE" Dcdecp="0x12" Dpacbti="NO_PACBTI"/>
+        <processor Pname="cm0_core1" Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"
+          Ddsp="DSP" Dtz="TZ" Dmve="MVE" Dcdecp="0x34" Dpacbti="PACBTI" Punits="1"/>
         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
         <memory name="FLASH_DUAL" access="rx" start="0x00000000" size="0x00080000" startup="1" default="1" Pname="cm0_core0"/>
         <memory name="SRAM_DUAL"  access="rwx" start="0x80000000" size="0x00020000" uninit="1" default="1" Pname="cm0_core1"/>

diff --git a/tools/projmgr/include/ProjMgrRunDebug.h b/tools/projmgr/include/ProjMgrRunDebug.h
@@ -65,11 +65,31 @@ struct FlashInfoType {
   std::string pname;
 };
 
+/**
+  * @brief processor capabilities
+ */
+struct ProcessorCapabilitiesType {
+  std::string core;
+  std::string revision;
+  std::string pname;
+  std::string endian;
+  std::string fpu;
+  std::string mpu;
+  std::string dsp;
+  std::string trustzone;
+  std::string mve;
+  std::string pacbti;
+  unsigned int maxClock = 0;
+  std::optional<unsigned int> punits;
+  std::optional<unsigned int> cdecp;
+};
+
 /**
  * @brief system resources type
 */
 struct SystemResourcesType {
   std::vector<MemoryType> memories;
+  std::vector<ProcessorCapabilitiesType> processors;
 };
 
 /**

diff --git a/tools/projmgr/include/ProjMgrYamlParser.h b/tools/projmgr/include/ProjMgrYamlParser.h
@@ -56,6 +56,7 @@ static constexpr const char* YAML_CBUILD_PACK = "cbuild-pack";
 static constexpr const char* YAML_CBUILD_RUN = "cbuild-run";
 static constexpr const char* YAML_CBUILD_SET = "cbuild-set";
 static constexpr const char* YAML_CDEFAULT = "cdefault";
+static constexpr const char* YAML_CDECP = "cdecp";
 static constexpr const char* YAML_CLAYERS = "clayers";
 static constexpr const char* YAML_CLAYER = "clayer";
 static constexpr const char* YAML_CLOCK = "clock";
@@ -159,6 +160,7 @@ static constexpr const char* YAML_LINKER = "linker";
 static constexpr const char* YAML_LINK_TIME_OPTIMIZE = "link-time-optimize";
 static constexpr const char* YAML_MAP = "map";
 static constexpr const char* YAML_MASK = "mask";
+static constexpr const char* YAML_MAX_CLOCK = "max-clock";
 static constexpr const char* YAML_MAX_INSTANCES = "maxInstances";
 static constexpr const char* YAML_MEMORY = "memory";
 static constexpr const char* YAML_MESSAGES = "messages";
@@ -173,6 +175,7 @@ static constexpr const char* YAML_MISC_LINK = "Link";
 static constexpr const char* YAML_MISC_LINK_C = "Link-C";
 static constexpr const char* YAML_MISC_LINK_CPP = "Link-CPP";
 static constexpr const char* YAML_MODE = "mode";
+static constexpr const char* YAML_MPU = "mpu";
 static constexpr const char* YAML_MVE = "mve";
 static constexpr const char* YAML_NAME = "name";
 static constexpr const char* YAML_NOTFORCONTEXT = "not-for-context";
@@ -186,6 +189,7 @@ static constexpr const char* YAML_OUTPUT_INTDIR = "intdir";
 static constexpr const char* YAML_OUTPUT_OUTDIR = "outdir";
 static constexpr const char* YAML_OUTPUT_RTEDIR = "rtedir";
 static constexpr const char* YAML_OUTPUT_TMPDIR = "tmpdir";
+static constexpr const char* YAML_PACBTI = "pacbti";
 static constexpr const char* YAML_PACK = "pack";
 static constexpr const char* YAML_PACKS = "packs";
 static constexpr const char* YAML_PACKS_MISSING = "packs-missing";
@@ -214,6 +218,7 @@ static constexpr const char* YAML_REGIONS = "regions";
 static constexpr const char* YAML_RESET_SEQUENCE = "reset-sequence";
 static constexpr const char* YAML_RESOLVED_PACK = "resolved-pack";
 static constexpr const char* YAML_RESOLVED_PACKS = "resolved-packs";
+static constexpr const char* YAML_REVISION = "revision";
 static constexpr const char* YAML_RTE = "rte";
 static constexpr const char* YAML_RUN = "run";
 static constexpr const char* YAML_SCOPE = "scope";

diff --git a/tools/projmgr/schemas/common.schema.json b/tools/projmgr/schemas/common.schema.json
@@ -2185,7 +2185,7 @@
       "required": ["file", "type"]
     },
     "DebugSequencesType": {
-      "title": "system-resources:\nDocumentation: https://open-cmsis-pack.github.io/cmsis-toolbox/YML-CBuild-Format/#debug-sequences",
+      "title": "debug-sequences:\nDocumentation: https://open-cmsis-pack.github.io/cmsis-toolbox/YML-CBuild-Format/#debug-sequences",
       "description": "Tool actions for debugging, tracing, or programming.",
       "type": "array",
       "uniqueItems": true,
@@ -2227,7 +2227,8 @@
       "description": "List of the system resources available in target.",
       "type": "object",
       "properties": {
-        "memory": { "$ref": "#/definitions/SystemMemoriesType" }
+        "memory": { "$ref": "#/definitions/SystemMemoriesType" },
+        "processors": { "$ref": "#/definitions/ProcessorsCapabilitiesType" }
       },
       "additionalProperties": false
     },
@@ -2520,6 +2521,33 @@
       },
       "additionalProperties": false,
       "required": ["app-path"]
+    },
+    "ProcessorsCapabilitiesType": {
+      "title": "processors:\nDocumentation: https://open-cmsis-pack.github.io/cmsis-toolbox/YML-CBuild-Format/#processors",
+      "description": "Capabilities of the device processors.",
+      "type": "array",
+      "uniqueItems": true,
+      "items": { "$ref": "#/definitions/ProcessorCapabilitiesType" }
+    },
+    "ProcessorCapabilitiesType": {
+      "type": "object",
+      "properties": {
+        "core":      { "type": "string", "description": "Specifies the core type." },
+        "revision":  { "type": "string", "description": "Hardware revision of the processor core." },
+        "pname":     { "type": "string", "description": "Processor identifier. This attribute is mandatory for devices that embed multiple processors." },
+        "endian":    { "enum": [ "little", "big", "configurable" ], "description": "Specifies the endianess of the processor." },
+        "fpu":       { "enum": [ "sp", "dp", "none" ], "description": "Specifies whether a hardware Floating Point Unit is present in the processor." },
+        "mpu":       { "enum": [ "present", "none" ], "description": "Specifies whether an Arm-based Memory Protection Unit is present in the processor." },
+        "dsp":       { "enum": [ "present", "none" ], "description": "Specifies whether a device supports the DSP instructions set." },
+        "trustzone": { "enum": [ "present", "none" ], "description": "Specifies whether an Armv8-M based device implements TrustZone." },
+        "mve":       { "enum": [ "int", "fp", "none" ], "description": "Specifies whether a device supports the M-Profile Vector instruction set extension." },
+        "pacbti":    { "enum": [ "present", "none" ], "description": "Specifies whether a device implements Pointer Authentication/Branch Target Identification (PAC/BTI) instructions." },
+        "max-clock": { "type": "number", "description": "Specifies the max clock frequency of the processor subsystem." },
+        "punits":    { "type": "number", "description": "Specifies the number of processor units in a symmetric multi-processor core (MPCore)." },
+        "cdecp":     { "type": "number", "description": "Specifies whether a device implements Custom Datapath Extension Coprocessors and which coprocessor interfaces can be used." }
+      },
+      "additionalProperties": false,
+      "required": ["core", "revision", "max-clock"]
     }
   }
 }
diff --git a/tools/projmgr/src/ProjMgrCbuildRun.cpp b/tools/projmgr/src/ProjMgrCbuildRun.cpp
@@ -134,6 +134,32 @@ void ProjMgrCbuildRun::SetResourcesNode(YAML::Node node, const SystemResourcesTy
     SetNodeValue(memoryNode[YAML_FROM_PACK], item.fromPack);
     node[YAML_MEMORY].push_back(memoryNode);
   }
+  for (const auto& item : systemResources.processors) {
+    YAML::Node processorNode;
+    const vector<pair<const string, const string&>> attrMap = {
+      { YAML_CORE      , item.core      },
+      { YAML_REVISION  , item.revision  },
+      { YAML_PNAME     , item.pname     },
+      { YAML_ENDIAN    , item.endian    },
+      { YAML_FPU       , item.fpu       },
+      { YAML_MPU       , item.mpu       },
+      { YAML_DSP       , item.dsp       },
+      { YAML_TRUSTZONE , item.trustzone },
+      { YAML_MVE       , item.mve       },
+      { YAML_PACBTI    , item.pacbti    },
+    };
+    for (const auto& [key, attr] : attrMap) {
+      SetNodeValue(processorNode[key], attr);
+    }    
+    processorNode[YAML_MAX_CLOCK] = item.maxClock;
+    if (item.punits.has_value()) {
+      processorNode[YAML_PUNITS] = item.punits.value();
+    }
+    if (item.cdecp.has_value()) {
+      processorNode[YAML_CDECP] = ProjMgrUtils::ULLToHex(item.cdecp.value(), 2);
+    }
+    node[YAML_PROCESSORS].push_back(processorNode);
+  }
 }
 
 void ProjMgrCbuildRun::SetDebuggerNode(YAML::Node node, const DebuggerType& debugger) {

diff --git a/tools/projmgr/src/ProjMgrRunDebug.cpp b/tools/projmgr/src/ProjMgrRunDebug.cpp
@@ -68,7 +68,7 @@ bool ProjMgrRunDebug::CollectSettings(const vector<ContextItem*>& contexts, cons
   const auto& pnames = context0->rteDevice->GetProcessors();
 
   // device collections
-  for (const auto& [pname, _] : pnames) {
+  for (const auto& [pname, processor] : pnames) {
     if (context0->devicePack) {
       m_runDebug.devicePack = context0->devicePack->GetPackageID(true);
       const auto& deviceAlgorithms = context0->rteDevice->GetEffectiveProperties("algorithm", pname);
@@ -96,6 +96,35 @@ bool ProjMgrRunDebug::CollectSettings(const vector<ContextItem*>& contexts, cons
         PushBackUniquely(flashInfo, deviceFlashInfo, pname);
       }
     }
+
+    // processor capabilities: core, revision and max-clock are mandatory
+    ProcessorCapabilitiesType item;
+    item.core = processor->GetAttribute(RteConstants::RTE_DCORE);
+    item.revision = processor->GetAttribute(RteConstants::RTE_DCORE_VERSION);
+    item.maxClock = processor->GetAttributeAsUnsigned(RteConstants::RTE_DCLOCK);
+    item.pname = pname;
+    if (processor->HasAttribute("Punits")) {
+      item.punits = processor->GetAttributeAsUnsigned("Punits");
+    }
+    if (processor->HasAttribute("Dcdecp")) {
+      item.cdecp = processor->GetAttributeAsUnsigned("Dcdecp");
+    }
+    // Get processor attributes
+    const map<const string, string&> attrMap = {
+      { RteConstants::RTE_DENDIAN , item.endian    },
+      { RteConstants::RTE_DFPU    , item.fpu       },
+      { RteConstants::RTE_DMPU    , item.mpu       },
+      { RteConstants::RTE_DDSP    , item.dsp       },
+      { RteConstants::RTE_DTZ     , item.trustzone },
+      { RteConstants::RTE_DMVE    , item.mve       },
+      { RteConstants::RTE_DPACBTI , item.pacbti    },
+    };
+    for (auto& [key, value] : attrMap) {
+      if (processor->HasAttribute(key)) {
+        value = RteConstants::GetDeviceAttribute(key, processor->GetAttribute(key), RteConstants::ProcessorCapabilities);
+      }
+    }
+    m_runDebug.systemResources.processors.push_back(item);
   }
 
   // default ramstart/size: use the first memory with default=1 and rwx attribute

diff --git a/tools/projmgr/test/data/ExternalGenerator/ref/MultiCore/core0.Debug+MultiCore.cbuild-gen.yml b/tools/projmgr/test/data/ExternalGenerator/ref/MultiCore/core0.Debug+MultiCore.cbuild-gen.yml
@@ -15,7 +15,9 @@ build-gen:
     - file: ${DEVTOOLS(data)}/ExternalGenerator/.cmsis/extgen+MultiCore.dbgconf
       version: 0.0.2
   processor:
+    dsp: off
     fpu: off
+    mve: fp
     core: Cortex-M0
   packs:
     - pack: ARM::RteTestGenerator@0.1.0

diff --git a/tools/projmgr/test/data/ExternalGenerator/ref/MultiCore/core1.Debug+MultiCore.cbuild-gen.yml b/tools/projmgr/test/data/ExternalGenerator/ref/MultiCore/core1.Debug+MultiCore.cbuild-gen.yml
@@ -15,7 +15,9 @@ build-gen:
     - file: ${DEVTOOLS(data)}/ExternalGenerator/.cmsis/extgen+MultiCore.dbgconf
       version: 0.0.2
   processor:
-    fpu: off
+    dsp: on
+    fpu: dp
+    mve: int
     core: Cortex-M0
   packs:
     - pack: ARM::RteTestGenerator@0.1.0

diff --git a/tools/projmgr/test/data/ImageOnly/ref/image-only+CM0.cbuild-run.yml b/tools/projmgr/test/data/ImageOnly/ref/image-only+CM0.cbuild-run.yml
@@ -27,6 +27,13 @@ cbuild-run:
         start: 0x20000000
         size: 0x00020000
         from-pack: ARM::RteTest_DFP@0.2.0
+    processors:
+      - core: Cortex-M0
+        revision: r0p0
+        endian: configurable
+        fpu: none
+        mpu: none
+        max-clock: 10000000
   system-descriptions:
     - file: ${CMSIS_PACK_ROOT}/ARM/RteTest_DFP/0.2.0/Device/ARM/SVD/ARMCM0.svd
       type: svd

diff --git a/...s/projmgr/test/data/TestAccessSequences/ref/test-access-sequences3.Debug+TEST_TARGET.cprj b/...s/projmgr/test/data/TestAccessSequences/ref/test-access-sequences3.Debug+TEST_TARGET.cprj
@@ -14,7 +14,7 @@
     <compiler name="AC6" version="6.18.0"/>
   </compilers>
 
-  <target Dfpu="NO_FPU" Dname="RteTest_ARMCM0_Dual" Dsecure="Secure" Dvendor="ARM:82" Pname="cm0_core0">
+  <target Ddsp="NO_DSP" Dfpu="NO_FPU" Dmve="FP_MVE" Dname="RteTest_ARMCM0_Dual" Dsecure="Secure" Dtz="NO_TZ" Dvendor="ARM:82" Pname="cm0_core0">
     <output bin="test-access-sequences3.bin" cmse-lib="test-access-sequences3_CMSE_Lib.o" elf="test-access-sequences3.axf" hex="test-access-sequences3.hex" intdir="tmp/test-access-sequences3/TEST_TARGET/Debug" name="test-access-sequences3" outdir="out/test-access-sequences3/TEST_TARGET/Debug" rtedir="../data/TestAccessSequences/RTE" type="exe"/>
     <cflags add="-O1 -g LAYER-D(RteTest_ARMCM0_Dual)" compiler="AC6"/>
     <cxxflags add="-O1 -g LAYER-D(RteTest_ARMCM0_Dual)" compiler="AC6"/>

diff --git a/...projmgr/test/data/TestAccessSequences/ref/test-access-sequences3.Release+TEST_TARGET.cprj b/...projmgr/test/data/TestAccessSequences/ref/test-access-sequences3.Release+TEST_TARGET.cprj
@@ -14,7 +14,7 @@
     <compiler name="AC6" version="6.18.0"/>
   </compilers>
 
-  <target Dfpu="NO_FPU" Dname="RteTest_ARMCM0_Dual" Dsecure="Secure" Dvendor="ARM:82" Pname="cm0_core0">
+  <target Ddsp="NO_DSP" Dfpu="NO_FPU" Dmve="FP_MVE" Dname="RteTest_ARMCM0_Dual" Dsecure="Secure" Dtz="NO_TZ" Dvendor="ARM:82" Pname="cm0_core0">
     <output bin="test-access-sequences3.bin" cmse-lib="test-access-sequences3_CMSE_Lib.o" elf="test-access-sequences3.axf" hex="test-access-sequences3.hex" intdir="tmp/test-access-sequences3/TEST_TARGET/Release" name="test-access-sequences3" outdir="out/test-access-sequences3/TEST_TARGET/Release" rtedir="../data/TestAccessSequences/RTE" type="exe"/>
     <asflags add="-DEF_SOLUTION=../data/TestAccessSequences/test-access-sequences2" compiler="AC6"/>
     <cflags add="-O3 LAYER-D(RteTest_ARMCM0_Dual)" compiler="AC6"/>