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author
andbararm
committed
optimizations (NVIC) and aligned register names for display
1 parent b0f8dc7 commit 3e14bdf

5 files changed

Lines changed: 220 additions & 164 deletions

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‎configs/core-peripherals/Fault_Reports.scvd‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -42,11 +42,10 @@
4242
</calc>
4343
<read name="SecureFaultRegisters" cond="ShowSecureFaults" type="SecureFaultRegisters_t" offset="0xE000EDE4"/>
4444
<out name="Fault Reports">
45-
<item property="ID_PFR1" value="%x[ID_PFR1]"/>
4645
<item property="Memory Manage Faults" value="">
47-
<item property="Address (SCB->MMFAR)" value="%x[StandardFaultRegisters.MMFAR]">
46+
<item property="Address (MMFAR)" value="%x[StandardFaultRegisters.MMFAR]">
4847
</item>
49-
<item property="Status (SCB->CFSR->MMFSR)" value="%x[StandardFaultRegisters.MMFSR]">
48+
<item property="Status (MMFSR)" value="%x[StandardFaultRegisters.MMFSR]">
5049
<item property="IACCVIOL" value="%d[(StandardFaultRegisters.MMFSR&gt;&gt;0)&amp;0x1]"/>
5150
<item property="DACCVIOL" value="%d[(StandardFaultRegisters.MMFSR&gt;&gt;1)&amp;0x1]"/>
5251
<item property="MUNSTKERR" value="%d[(StandardFaultRegisters.MMFSR&gt;&gt;3)&amp;0x1]"/>
@@ -56,9 +55,9 @@
5655
</item>
5756
</item>
5857
<item property="Bus Faults" value="">
59-
<item property="Address (SCB->BFAR)" value="%x[StandardFaultRegisters.BFAR]">
58+
<item property="Address (BFAR)" value="%x[StandardFaultRegisters.BFAR]">
6059
</item>
61-
<item property="Status (SCB->CFSR->BFSR)" value="%x[StandardFaultRegisters.BFSR]">
60+
<item property="Status (BFSR)" value="%x[StandardFaultRegisters.BFSR]">
6261
<item property="IBUSERR" value="%d[(StandardFaultRegisters.BFSR&gt;&gt;0)&amp;0x1]"/>
6362
<item property="PRECISERR" value="%d[(StandardFaultRegisters.BFSR&gt;&gt;1)&amp;0x1]"/>
6463
<item property="IMPRECISERR" value="%d[(StandardFaultRegisters.BFSR&gt;&gt;2)&amp;0x1]"/>
@@ -69,7 +68,7 @@
6968
</item>
7069
</item>
7170
<item property="Usage Faults" value="">
72-
<item property="Status (SCB->CFSR->UFSR)" value="%x[StandardFaultRegisters.UFSR]">
71+
<item property="Status (UFSR)" value="%x[StandardFaultRegisters.UFSR]">
7372
<item property="UNDEFINSTR" value="%d[(StandardFaultRegisters.UFSR&gt;&gt;0)&amp;0x1]"/>
7473
<item property="INVSTATE" value="%d[(StandardFaultRegisters.UFSR&gt;&gt;1)&amp;0x1]"/>
7574
<item property="INVPC" value="%d[(StandardFaultRegisters.UFSR&gt;&gt;2)&amp;0x1]"/>
@@ -80,14 +79,14 @@
8079
</item>
8180
</item>
8281
<item property="Hard Faults" value="">
83-
<item property="Status (SCB->HFSR)" value="%x[StandardFaultRegisters.HFSR]">
82+
<item property="Status (HFSR)" value="%x[StandardFaultRegisters.HFSR]">
8483
<item property="VECTTBL" value="%d[(StandardFaultRegisters.HFSR&gt;&gt;1)&amp;0x1]"/>
8584
<item property="FORCED" value="%d[(StandardFaultRegisters.HFSR&gt;&gt;30)&amp;0x1]"/>
8685
<item property="DEBUGEVT" value="%d[(StandardFaultRegisters.HFSR&gt;&gt;31)&amp;0x1]"/>
8786
</item>
8887
</item>
8988
<item property="Debug Faults" value="">
90-
<item property="Status (SCB->DFSR)" value="%x[StandardFaultRegisters.DFSR]">
89+
<item property="Status (DFSR)" value="%x[StandardFaultRegisters.DFSR]">
9190
<item property="HALTED" value="%d[(StandardFaultRegisters.DFSR&gt;&gt;0)&amp;0x1]"/>
9291
<item property="BKPT" value="%d[(StandardFaultRegisters.DFSR&gt;&gt;1)&amp;0x1]"/>
9392
<item property="DWTTRAP" value="%d[(StandardFaultRegisters.DFSR&gt;&gt;2)&amp;0x1]"/>
@@ -97,13 +96,13 @@
9796
</item>
9897
</item>
9998
<item property="Auxiliary Faults" value="">
100-
<item property="Status (SCB->AFSR)" value="%x[StandardFaultRegisters.AFSR]">
99+
<item property="Status (AFSR)" value="%x[StandardFaultRegisters.AFSR]">
101100
</item>
102101
</item>
103-
<item property="Secure Faults" cond="ShowSecureFaults" value="">
104-
<item property="Address (SCB->SFAR)" value="%x[SecureFaultRegisters.SFAR]">
102+
<item property="Secure Faults" cond="ShowSecureFaults">
103+
<item property="Address (SFAR)" value="%x[SecureFaultRegisters.SFAR]">
105104
</item>
106-
<item property="Status (SCB->CFSR->BFSR)" value="%x[SecureFaultRegisters.SFSR]">
105+
<item property="Status (SFSR)" value="%x[SecureFaultRegisters.SFSR]">
107106
<item property="INVEP" value="%d[(SecureFaultRegisters.SFSR&gt;&gt;0)&amp;0x1]"/>
108107
<item property="INVIS" value="%d[(SecureFaultRegisters.SFSR&gt;&gt;1)&amp;0x1]"/>
109108
<item property="INVER" value="%d[(SecureFaultRegisters.SFSR&gt;&gt;2)&amp;0x1]"/>

‎configs/core-peripherals/Memory_Protection_Unit.scvd‎

Lines changed: 28 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,10 @@
6767
<var name="Enable" type="uint8_t" size="1"/>
6868
<var name="StartAddress" type="uint32_t" size="1"/>
6969
<var name="EndAddress" type="uint32_t" size="1"/>
70-
<var name="ExecuteNever" type="uint8_t" size="1"/>
70+
<var name="ExecuteNever" type="uint8_t" size="1">
71+
<enum name="X" value="0x0"/>
72+
<enum name="XN" value="0x1"/>
73+
</var>
7174
<var name="AccessPermissions" type="uint8_t" size="1">
7275
<enum name="Read/write by privileged code only" value="0x0"/>
7376
<enum name="Read/write by any privilege level" value="0x1"/>
@@ -81,7 +84,10 @@
8184
<enum name="Inner Shareable" value="0x3"/>
8285
</var>
8386
<var name="AttributeIndex" type="uint8_t" size="1"/>
84-
<var name="PrivilegedExecuteNever" type="uint8_t" size="1"/>
87+
<var name="PrivilegedExecuteNever" type="uint8_t" size="1">
88+
<enum name="X" value="0x0"/>
89+
<enum name="XN" value="0x1"/>
90+
</var>
8591
</typedef>
8692
</typedefs>
8793
<objects>
@@ -97,7 +103,10 @@
97103
<read name="MPU_Region" type="MPU_Region_t" offset="0xE000ED9C"/>
98104
<read name="MPU_Attributes" type="MPU_Attributes_t" offset="0xE000EDC0"/>
99105
<var name="Count" type="uint32_t" value="0"/>
100-
106+
<var name="InnerVal" type="uint32_t" value="0"/>
107+
<var name="OuterVal" type="uint32_t" value="0"/>
108+
<var name="DeviceVal" type="uint32_t" value="0"/>
109+
101110
<calc cond="1">
102111
MPU_Region.Number=(MPU_RNR_value&gt;&gt;0)&amp;0xFF;
103112
MPU_Region.Enable=(MPU_Region.MPU_RLAR_value&gt;&gt;0)&amp;0x1;
@@ -118,16 +127,16 @@
118127
</calc>
119128
</list>
120129
<out name="Memory Protection Unit">
121-
<item property="MPU Type (MPU_TYPE)" value="%x[MPU_TYPE_value]">
130+
<item property="Type (MPU_TYPE)" value="%x[MPU_TYPE_value]">
122131
<item property="DREGION" value="%d[(MPU_TYPE_value&gt;&gt;8)&amp;0xFF]" info="Number of regions supported by the MPU."/>
123132
<item property="SEPARATE" value="%d[(MPU_TYPE_value&gt;&gt;0)&amp;0x1]"/>
124133
</item>
125-
<item property="MPU Control (MPU_CTRL)" value="%x[MPU_CTRL_value]">
134+
<item property="Control (MPU_CTRL)" value="%x[MPU_CTRL_value]">
126135
<item property="PRIVDEFENA" value="%d[(MPU_CTRL_value&gt;&gt;2)&amp;0x1]"/>
127136
<item property="HFNMIENA" value="%d[(MPU_CTRL_value&gt;&gt;1)&amp;0x1]"/>
128137
<item property="ENABLE" value="%d[(MPU_CTRL_value&gt;&gt;0)&amp;0x1]"/>
129138
</item>
130-
<item property="MPU Region Number (MPU_RNR)" value="%x[MPU_RNR_value]">
139+
<item property="Region Number (MPU_RNR)" value="%x[MPU_RNR_value]">
131140
<item property="REGION" value="%d[(MPU_RNR_value&gt;&gt;0)&amp;0xFF]"/>
132141
</item>
133142
<!--
@@ -178,7 +187,7 @@
178187
<item property="Enable" value="%t[MPU_Region.Enable ? &quot;yes&quot; : &quot;no&quot;]"/>
179188
<item property="Start Address" value="%x[MPU_Region.StartAddress]"/>
180189
<item property="End Address" value="%x[MPU_Region.EndAddress]"/>
181-
<item property="Execute Never" value="%t[MPU_Region.ExecuteNever ? &quot;yes&quot; : &quot;no&quot;]"/>
190+
<item property="Execute Never" value="%E[MPU_Region.ExecuteNever]"/>
182191
<item property="Access permissions" value="%E[MPU_Region.AccessPermissions]"/>
183192
<item property="Shareability" value="%E[MPU_Region.Shareability]"/>
184193
<item>
@@ -187,18 +196,23 @@
187196
<print property="Attribute index" value="%d[MPU_Region.AttributeIndex] (Outer:%E[MPU_Attributes.Attr_Outer[MPU_Region.AttributeIndex]], Inner: %E[MPU_Attributes.Attr_Inner[MPU_Region.AttributeIndex]])" cond="(MPU_Attributes.Attr_Outer[MPU_Region.AttributeIndex]!=0) &amp;&amp; (MPU_Attributes.Attr_Inner[MPU_Region.AttributeIndex]!=0)"/>
188197
<print property="Attribute index" value="%d[MPU_Region.AttributeIndex] (Outer:%E[MPU_Attributes.Attr_Outer[MPU_Region.AttributeIndex]], Inner: UNPREDICTABLE)" cond="(MPU_Attributes.Attr_Outer[MPU_Region.AttributeIndex]!=0) &amp;&amp; (MPU_Attributes.Attr_Inner[MPU_Region.AttributeIndex]==0)"/>
189198
</item>
190-
<item property="Privileged execute never" value="%t[MPU_Region.PrivilegedExecuteNever ? &quot;yes&quot; : &quot;no&quot;]"/>
199+
<item property="Privileged execute never" value="%E[MPU_Region.PrivilegedExecuteNever]"/>
191200
</item>
192201

193202
<item property="Attributes" value="">
194203
<list name="Count" start="0" limit="8">
204+
<calc>
205+
InnerVal=MPU_Attributes.Attr_Inner[Count];
206+
OuterVal=MPU_Attributes.Attr_Outer[Count];
207+
DeviceVal=MPU_Attributes.Attr_Device[Count];
208+
</calc>
195209
<item>
196-
<print property="%d[Count]" value="Device: %E[MPU_Attributes.Attr_Device[Count]]" cond="(MPU_Attributes.Attr_Outer[Count]==0) &amp;&amp; ((MPU_Attributes.Attr_Device[Count]&amp;3)==0)"/>
197-
<print property="%d[Count]" value="Device: UNPREDICTABLE" cond="(MPU_Attributes.Attr_Outer[Count]==0) &amp;&amp; ((MPU_Attributes.Attr_Device[Count]&amp;3)!=0)"/>
198-
<print property="%d[Count]" value="Outer:%E[MPU_Attributes.Attr_Outer[Count]], Inner: %E[MPU_Attributes.Attr_Inner[Count]]" cond="(MPU_Attributes.Attr_Outer[Count]!=0) &amp;&amp; (MPU_Attributes.Attr_Inner[Count]!=0)"/>
199-
<print property="%d[Count]" value="Outer:%E[MPU_Attributes.Attr_Outer[Count]], Inner: UNPREDICTABLE" cond="(MPU_Attributes.Attr_Outer[Count]!=0) &amp;&amp; (MPU_Attributes.Attr_Inner[Count]==0)"/>
200-
<item property="Attr&lt;%d[Count]&gt;[7:4]" value="%x[MPU_Attributes.Attr_Outer[Count]]" cond="1"/>
201-
<item property="Attr&lt;%d[Count]&gt;[3:0]" value="%x[MPU_Attributes.Attr_Inner[Count]]" cond="1"/>
210+
<print property="%d[Count]" value="Device: %E[MPU_Attributes.Attr_Device[Count]]" cond="(OuterVal==0) &amp;&amp; ((DeviceVal&amp;3)==0)"/>
211+
<print property="%d[Count]" value="Device: UNPREDICTABLE" cond="(OuterVal==0) &amp;&amp; ((DeviceVal&amp;3)!=0)"/>
212+
<print property="%d[Count]" value="Outer:%E[MPU_Attributes.Attr_Outer[Count]], Inner: %E[MPU_Attributes.Attr_Inner[Count]]" cond="(OuterVal!=0) &amp;&amp; (InnerVal!=0)"/>
213+
<print property="%d[Count]" value="Outer:%E[MPU_Attributes.Attr_Outer[Count]], Inner: UNPREDICTABLE" cond="(OuterVal!=0) &amp;&amp; (InnerVal==0)"/>
214+
<item property="Attr&lt;%d[Count]&gt;[7:4]" value="%x[OuterVal]" cond="1"/>
215+
<item property="Attr&lt;%d[Count]&gt;[3:0]" value="%x[InnerVal]" cond="1"/>
202216
</item>
203217
</list>
204218
</item>

‎configs/core-peripherals/Memory_Protection_Unit_V7M.scvd‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -185,15 +185,15 @@
185185
MPU_Region.InnerPolicy=TEXCB_Bits&amp;0x3;
186186
</calc>
187187
<out name="Memory Protection Unit">
188-
<item property="MPU Type (MPU_TYPE)" value="%x[MPU_Registers.MPU_TYPE]">
188+
<item property="Type (MPU_TYPE)" value="%x[MPU_Registers.MPU_TYPE]">
189189
<item property="DREGION" value="%d[(MPU_Registers.MPU_TYPE&gt;&gt;8)&amp;0xFF]" info="Number of regions supported by the MPU."/>
190190
</item>
191-
<item property="MPU Control (MPU_CTRL)" value="%x[MPU_Registers.MPU_CTRL]">
191+
<item property="Control (MPU_CTRL)" value="%x[MPU_Registers.MPU_CTRL]">
192192
<item property="ENABLE" value="%d[(MPU_Registers.MPU_CTRL&gt;&gt;0)&amp;0x1]"/>
193193
<item property="HFNMIENA" value="%d[(MPU_Registers.MPU_CTRL&gt;&gt;1)&amp;0x1]"/>
194194
<item property="PRIVDEFENA" value="%d[(MPU_Registers.MPU_CTRL&gt;&gt;2)&amp;0x1]"/>
195195
</item>
196-
<item property="MPU Region Number (MPU_RNR)" value="%x[MPU_Registers.MPU_RNR]">
196+
<item property="Region Number (MPU_RNR)" value="%x[MPU_Registers.MPU_RNR]">
197197
<item property="REGION" value="%d[(MPU_Registers.MPU_RNR&gt;&gt;0)&amp;0xFF]"/>
198198
</item>
199199
<item property="Current Region" value="">

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