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| 1 | +<?xml version="1.0" encoding="utf-8"?> |
| 2 | +<!-- |
| 3 | + Copyright 2026 Arm Limited |
| 4 | + |
| 5 | + Licensed under the Apache License, Version 2.0 (the "License"); |
| 6 | + you may not use this file except in compliance with the License. |
| 7 | + You may obtain a copy of the License at |
| 8 | +
|
| 9 | + http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | +
|
| 11 | + Unless required by applicable law or agreed to in writing, software |
| 12 | + distributed under the License is distributed on an "AS IS" BASIS, |
| 13 | + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | + See the License for the specific language governing permissions and |
| 15 | + limitations under the License. |
| 16 | +--> |
| 17 | +<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd"> |
| 18 | + <component name="NestedVectoredInterruptControllerComponent" version="1.0.0"/> |
| 19 | + <typedefs> |
| 20 | + <typedef name="Vector_t" size="4"> |
| 21 | + <member name="INTLINESNUM" type="uint32_t" offset="0"/> |
| 22 | + <var name="Enable" type="uint8_t" size="256"> |
| 23 | + <enum name="not enabled" value="0"/> |
| 24 | + <enum name="enabled" value="1"/> |
| 25 | + </var> |
| 26 | + <var name="Pending" type="uint8_t" size="256"> |
| 27 | + <enum name="not pending" value="0"/> |
| 28 | + <enum name="pending" value="1"/> |
| 29 | + </var> |
| 30 | + <var name="Active" type="uint8_t" size="256"> |
| 31 | + <enum name="not active" value="0"/> |
| 32 | + <enum name="active" value="1"/> |
| 33 | + </var> |
| 34 | + <var name="Priority" type="uint8_t" size="256"/> |
| 35 | + <var name="Displayed" type="uint8_t" size="256"/> |
| 36 | + <var name="Index" type="uint8_t" size="256"> |
| 37 | + <enum name="Thread Mode" value="0"/> |
| 38 | + <enum name="Non-maskable Interrupt (NMI)" value="2"/> |
| 39 | + <enum name="Hard Fault (HARDFAULT)" value="3" /> |
| 40 | + <enum name="Memory Management (MEMFAULT)" value="4" /> |
| 41 | + <enum name="Bus Fault (BUSFAULT)" value="5" /> |
| 42 | + <enum name="Usage Fault (USGFAULT)" value="6" /> |
| 43 | + <enum name="Secure Fault (SECUREFAULT)" value="7" /> |
| 44 | + <enum name="System Service Call (SVCALL)" value="11" /> |
| 45 | + <enum name="Debug Monitor (MONITOR)" value="12" /> |
| 46 | + <enum name="Pend System Service (PENDSV)" value="14" /> |
| 47 | + <enum name="System Tick Timer (SYSTICK)" value="15" /> |
| 48 | + </var> |
| 49 | + </typedef> |
| 50 | + </typedefs> |
| 51 | + <objects> |
| 52 | + <object name="NestedVectoredInterruptControllerObject"> |
| 53 | + <var name="WithSecureExtension" type="uint8_t" value="1"/> |
| 54 | + <read name="SHCSR_value" type="uint32_t" offset="0xE000ED24"/> |
| 55 | + <read name="SHPR_values" type="uint32_t" size="3" offset="0xE000ED18"/> |
| 56 | + <read name="ICSR_value" type="uint32_t" offset="0xE000ED04"/> |
| 57 | + <read name="AIRCR_value" type="uint32_t" offset="0xE000ED0C"/> |
| 58 | + <read name="VTOR_value" type="uint32_t" offset="0xE000ED08"/> |
| 59 | + <read name="DEMCR_value" type="uint32_t" offset="0xE000EDFC"/> |
| 60 | + <read name="SYST_CSR_value" type="uint32_t" offset="0xE000E010"/> |
| 61 | + <read name="NVIC_ISER_values" type="uint32_t" size="8" offset="0xE000E100"/> |
| 62 | + <read name="NVIC_ISPR_values" type="uint32_t" size="8" offset="0xE000E200"/> |
| 63 | + <read name="NVIC_IABR_values" type="uint32_t" size="8" offset="0xE000E300"/> |
| 64 | + <read name="NVIC_IPR_values" type="uint32_t" size="60" offset="0xE000E400"/> |
| 65 | + <read name="Vectors" type="Vector_t" offset="0xE000E004"/> |
| 66 | + <var name="Count" type="uint32_t" value="0"/> |
| 67 | + <list name="Count" start="0" limit="Vectors.INTLINESNUM*32"> |
| 68 | + <calc cond="1"> |
| 69 | + Vectors.Index[Count]=Count; |
| 70 | + </calc> |
| 71 | + |
| 72 | + <calc cond="0==( (Count==0) || (Count==1) || ( (Count==7) && (0==WithSecureExtension) ) || (Count==8) || (Count==9) || (Count==10) || (Count==13) )"> |
| 73 | + Vectors.Displayed[Count]=1; |
| 74 | + </calc> |
| 75 | + |
| 76 | + <calc cond="(Count==2)" info="values for NMI"> |
| 77 | + Vectors.Enable[Count]=1; |
| 78 | + Vectors.Pending[Count]=((ICSR_value>>31)&0x1); |
| 79 | + Vectors.Active[Count]=((ICSR_value>>0)&0x1F)==2; |
| 80 | + Vectors.Priority[Count]=-2; |
| 81 | + </calc> |
| 82 | +<!-- |
| 83 | +--> |
| 84 | + <calc cond="( Count==3 )" info="values for HARDFAULT"> |
| 85 | + Vectors.Enable[Count]=1; |
| 86 | + Vectors.Active[Count]=((ICSR_value>>0)&0x1F)==3; |
| 87 | + Vectors.Pending[Count]=0; |
| 88 | + Vectors.Priority[Count]=-1; |
| 89 | + </calc> |
| 90 | + <calc cond="( Count==4 )" info="values for MEMFAULT"> |
| 91 | + Vectors.Enable[Count]=((SHCSR_value>>16)&0x1); |
| 92 | + Vectors.Active[Count]=((SHCSR_value>>0)&0x1); |
| 93 | + Vectors.Pending[Count]=((SHCSR_value>>13)&0x1); |
| 94 | + Vectors.Priority[Count]=((SHPR_values[0]>>0)&0xFF); |
| 95 | + </calc> |
| 96 | + <calc cond="( Count==5 )" info="values for BUSFAULT"> |
| 97 | + Vectors.Enable[Count]=((SHCSR_value>>17)&0x1); |
| 98 | + Vectors.Active[Count]=((SHCSR_value>>1)&0x1); |
| 99 | + Vectors.Pending[Count]=((SHCSR_value>>14)&0x1); |
| 100 | + Vectors.Priority[Count]=((SHPR_values[0]>>8)&0xFF); |
| 101 | + </calc> |
| 102 | + <calc cond="( Count==6 )" info="values for USGFAULT"> |
| 103 | + Vectors.Enable[Count]=((SHCSR_value>>18)&0x1); |
| 104 | + Vectors.Active[Count]=((SHCSR_value>>3)&0x1); |
| 105 | + Vectors.Pending[Count]=((SHCSR_value>>12)&0x1); |
| 106 | + Vectors.Priority[Count]=((SHPR_values[0]>>16)&0xFF); |
| 107 | + </calc> |
| 108 | + <calc cond="( (Count==7) && WithSecureExtension )" info="values for SECUREFAULT"> |
| 109 | + Vectors.Enable[Count]=((SHCSR_value>>19)&0x1); |
| 110 | + Vectors.Active[Count]=((SHCSR_value>>4)&0x1); |
| 111 | + Vectors.Pending[Count]=((SHCSR_value>>20)&0x1); |
| 112 | + Vectors.Priority[Count]=((SHPR_values[0]>>24)&0xFF); |
| 113 | + </calc> |
| 114 | + <calc cond="( Count==11 )" info="values for SVCALL"> |
| 115 | + Vectors.Enable[Count]=1; |
| 116 | + Vectors.Active[Count]=((SHCSR_value>>7)&0x1); |
| 117 | + Vectors.Pending[Count]=((SHCSR_value>>15)&0x1); |
| 118 | + Vectors.Priority[Count]=((SHPR_values[1]>>24)&0xFF); |
| 119 | + </calc> |
| 120 | + <calc cond="( Count==12 )" info="values for MONITOR"> |
| 121 | + Vectors.Enable[Count]=((DEMCR_value>>16)&0x1); |
| 122 | + Vectors.Active[Count]=((SHCSR_value>>8)&0x1); |
| 123 | + Vectors.Pending[Count]=((DEMCR_value>>17)&0x1); |
| 124 | + Vectors.Priority[Count]=((SHPR_values[2]>>0)&0xFF); |
| 125 | + </calc> |
| 126 | + <calc cond="( Count==14 )" info="values for PENDSV"> |
| 127 | + Vectors.Enable[Count]=1; |
| 128 | + Vectors.Active[Count]=((SHCSR_value>>10)&0x1); |
| 129 | + Vectors.Pending[Count]=((ICSR_value>>28)&0x1); |
| 130 | + Vectors.Priority[Count]=((SHPR_values[2]>>16)&0xFF); |
| 131 | + </calc> |
| 132 | + <calc cond="( Count==15 )" info="values for SYSTICK"> |
| 133 | + Vectors.Enable[Count]=((SYST_CSR_value>>1)&0x1); |
| 134 | + Vectors.Active[Count]=((SHCSR_value>>11)&0x1); |
| 135 | + Vectors.Pending[Count]=((ICSR_value>>26)&0x1); |
| 136 | + Vectors.Priority[Count]=((SHPR_values[2]>>24)&0xFF); |
| 137 | + </calc> |
| 138 | + <!--Vectors.Priority[Count]=((SHPR_values[((Count-4)/4)]>>(((Count-4)&3)*8))&0xFF);--> |
| 139 | + |
| 140 | + <calc cond="( Count>15 )" info="values for EXTIRQn"> |
| 141 | + Vectors.Enable[Count]=((NVIC_ISER_values[((Count-16)/32)]>>(((Count-16)&0x1F)))&0x1); |
| 142 | + Vectors.Active[Count]=((NVIC_IABR_values[((Count-16)/32)]>>(((Count-16)&0x1F)))&0x1); |
| 143 | + Vectors.Pending[Count]=((NVIC_ISPR_values[((Count-16)/32)]>>(((Count-16)&0x1F)))&0x1); |
| 144 | + Vectors.Priority[Count]=((NVIC_IPR_values[((Count-16)/4)]>>(((Count-16)&0x3)*8))&0xFF); |
| 145 | + </calc> |
| 146 | + </list> |
| 147 | + <out name="Nested Vectored Interrupt Controller"> |
| 148 | +<!-- |
| 149 | + <item property="values for debugging" value=""> |
| 150 | + <item property="SHCSR_value>>16" value="%x[(SHCSR_value>>16)]"/> |
| 151 | + <item property="SHCSR_value" value="%x[(SHCSR_value)]"/> |
| 152 | + <item property="NVIC_ISER_values[0]" value="%x[NVIC_ISER_values[0]]"/> |
| 153 | + </item> |
| 154 | +--> |
| 155 | + <item property="INTLINESNUM" value="%d[Vectors.INTLINESNUM]"/> |
| 156 | + <item property="Interrupt Control and Status (ICSR)" value="%x[ICSR_value]"> |
| 157 | + <item property="ISRPENDING" value="%d[(ICSR_value>>22)&0x1]"/> |
| 158 | + <item property="VECTPENDING" value="%d[(ICSR_value>>12)&0x1F]"/> |
| 159 | + <item property="RETTOBASE" value="%d[(ICSR_value>>11)&0x1]"/> |
| 160 | + <item property="VECTACTIVE" value="%d[(ICSR_value>>0)&0x1F]"/> |
| 161 | + </item> |
| 162 | + <item property="Application Interrupt and Reset Control (AIRCR)" value="%x[AIRCR_value]"> |
| 163 | + <item property="ENDIANNESS" value="%d[(AIRCR_value>>15)&0x1]"/> |
| 164 | + <item property="PRIGROUP" value="%d[(AIRCR_value>>8)&0x7]"/> |
| 165 | + </item> |
| 166 | + <item property="Vector Table Offset (VTOR)" value="%x[VTOR_value]"> |
| 167 | + <item property="TBLOFF" value="%x[(VTOR_value>>7)&0x1FFFFFF]"/> |
| 168 | + </item> |
| 169 | + <item property="Vector Handlers" value=""> |
| 170 | + <list name="Count" start="0" limit="Vectors.INTLINESNUM*32"> |
| 171 | + <item> |
| 172 | + <print property="%E[Vectors.Index[Count]]" value="%E[Vectors.Enable[Count]], %E[Vectors.Pending[Count]], %E[Vectors.Active[Count]]" cond="Vectors.Displayed[Count]==1 && Count<16"/> |
| 173 | + <print property="External Interrupt %d[Count-16] (EXTIRQ%d[Count-16])" value="%E[Vectors.Enable[Count]], %E[Vectors.Pending[Count]], %E[Vectors.Active[Count]]" cond="Vectors.Displayed[Count]==1 && Count>15"/> |
| 174 | + <item property="Index" value="%d[Vectors.Index[Count]]"/> |
| 175 | + <item property="Enable" value="%d[Vectors.Enable[Count]]"/> |
| 176 | + <item property="Pending" value="%d[Vectors.Pending[Count]]"/> |
| 177 | + <item property="Active" value="%d[Vectors.Active[Count]]"/> |
| 178 | + <item property="Priority" value="%d[Vectors.Priority[Count]]"/> |
| 179 | + </item> |
| 180 | + </list> |
| 181 | + </item> |
| 182 | + </out> |
| 183 | + </object> |
| 184 | + </objects> |
| 185 | +</component_viewer> |
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