v1.5.1 Pre-Release Preparations

CHANGELOG.md

@@ -1,5 +1,24 @@
 # Change Log
 
+## 1.5.1
+
+- Adds `Fault Reports` to the [Core Peripherals](https://github.com/Open-CMSIS-Pack/vscode-cmsis-debugger?tab=readme-ov-file#core-peripherals) view.
+- Improves expand/collapse behavior with active filter in [Component Viewer](https://github.com/Open-CMSIS-Pack/vscode-cmsis-debugger?tab=readme-ov-file#component-viewer) and
+[Core Peripherals](https://github.com/Open-CMSIS-Pack/vscode-cmsis-debugger?tab=readme-ov-file#core-peripherals) views.
+- Includes updated pyOCD distribution ([pyOCD v0.44.0](https://github.com/pyocd/pyOCD/releases/tag/v0.44.0))
+    - Uses default debug sequences as defined in the
+    [Open-CMSIS-Pack specification](https://open-cmsis-pack.github.io/Open-CMSIS-Pack-Spec/main/html/debug_description.html#autotoc_md2).
+    - Adds missing sequence support for flash programming and holding hardware reset.
+    - Changes strategy of programming multiple flash memories from multiple erase-program-verify sequences per flash memory to a single
+    erase-program-verify sequence spannig all targeted flash memories.
+    - Renames RTT channel mode `telnet` to `server`.
+    - Adds Segger [SystemView](https://www.segger.com/products/development-tools/systemview/) server mode to support direct recording
+    from pyOCD via IP (TCP/IP connection) for [`run`](https://open-cmsis-pack.github.io/cmsis-toolbox/pyOCD-Debugger/#command-line-invocation)
+    subcommand.
+    - Improves robustness and logging of [Segger RTT](https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/)
+    support.
+    - See [pyOCD v0.44.0](https://github.com/pyocd/pyOCD/releases/tag/v0.44.0) for a full list of ehancements and bug fixes.
+
 ## 1.5.0
 
 - Pre-release with a preview of the new [Core Peripherals](https://github.com/Open-CMSIS-Pack/vscode-cmsis-debugger?tab=readme-ov-file#core-peripherals) view that lives under

README.md

@@ -314,6 +314,7 @@ The Core Peripherals view shows information about the following components if im
 - Nested Vectored Interrupt Controller
 - System Config and Control
 - System Tick Timer
+- Fault Reports
 
 ### PERIPHERALS
 

package.json

@@ -2,7 +2,7 @@
   "name": "vscode-cmsis-debugger",
   "displayName": "Arm CMSIS Debugger",
   "description": "Run and debug embedded and Edge AI projects on Arm Cortex-M single or multi core devices. Connects via pyOCD to CMSIS-DAP or other GDB servers.",
-  "version": "1.5.0",
+  "version": "1.5.1",
   "preview": false,
   "publisher": "Arm",
   "author": "Jens Reinecke <jens.reinecke@arm.com>",
@@ -608,7 +608,7 @@
     "yargs": "^18.0.0"
   },
   "cmsis": {
-    "pyocd": "pyocd/pyOCD@0.43.1",
+    "pyocd": "pyocd/pyOCD@0.44.0",
     "pyocdNightly": "pyocd/pyOCD@nightly",
     "gdb": "14.3.1"
   }