reginfo: add Hi3519DV500/Hi3516DV500 pinmux table + dispatch; audit cv6xx (#177)

DV500 (V5, aarch64) has three IOCFG controllers at IOCFG0 0x10260000,
IOCFG2 0x179F0000, IOCFG3 0x0EFF0000 (IOCFG2/3 differ from cv6xx), plus the
AON pad-mux in the PMC at 0x11120000. It is already detected as HISI_OT but
regs_by_chip() routed it to CV610regs, so reginfo decoded cv6xx pins at
cv6xx addresses. Add a dedicated DV500regs[] and dispatch 3519/3516DV500
to it.

Function lists are built from the vendor SDK pin_mux.c (every function the
SDK selects across its modes, indexed by mux value) and cross-checked /
extended with the vendor U-Boot register-init spreadsheets (the per-board
.xlsm "pinout"/"normal" sheets). For DV500 the xlsm filled the index-0 GPIO
and index-1 names pin_mux.c never configures (GPIO2_6/2_7, MDCLK0/MDIO0,
the GPIO13/14 alternates on the MIPI_RX1 pads), added five U-Boot-only pins
(PWM0/1/2, USB_PWREN, USB_OVRCUR), and provided the PMC AON GPIO9 pads
(0x11120204-0x1112021C). Mux values nothing selects are left "reserved".
All addresses verified in-range, de-duplicated, and every pin_mux.c-
configured register is covered.

Also audit CV610regs (cv6xx): against the SDK pin_mux.c, add 19 registers
the SDK configures that were missing (the VI data bus io2 0x30-0x78 and
UART2 io1 0x10/0x14); and against the vendor cv6xx U-Boot .xlsm, add five
more the kernel never touches: SFC_CSN1 (io0 0x24), USB_OVRCUR/USB_PWREN
(io0 0x58/0x5C) and the Ethernet link LEDs (io1 0x18/0x1C).

Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

Author: widgetii