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Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #2360

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Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #2360

Triggered via pull request August 21, 2025 10:03
@martin-frbgmartin-frbg
opened #5425
martin-frbg:fixup5389
Status Success
Total duration 56m 56s
Artifacts –

loongarch64.yml

on: pull_request
Matrix: TEST
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