Skip to content
Run codspeed benchmarks

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #1416

Sign in to view logs

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #1416

Triggered via pull request August 21, 2025 10:03
@martin-frbgmartin-frbg
opened #5425
martin-frbg:fixup5389
Status Success
Total duration 41m 19s
Artifacts –

codspeed-bench.yml

on: pull_request
Matrix: benchmarks
Fit to window
Zoom out
Zoom in

Annotations

1 warning
benchmarks (ubuntu-22.04, gfortran, make, 3.12)
Failed to restore: "/usr/bin/tar" failed with error: The process '/usr/bin/tar' failed with exit code 2