Update riscv64_vector.yml

Author: martin-frbg

.github/workflows/riscv64_vector.yml

@@ -140,7 +140,6 @@ jobs:
           while IFS= read -r -d $'\0' LOG; do cat $LOG ; FAILURES=1 ; done < <(grep -lZ FAIL ./test_out/*)
           if [[ ! -z $FAILURES ]]; then echo "==========" ; echo "== FAIL ==" ; echo "==========" ; echo ; exit 1 ; fi
           if [ "${{matrix.target}}" == "RISCV64_ZVL256B" ]; then
-          run_test test test_sbgemm &
           run_test test test_shgemm 
           fi