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Update riscv64_vector.yml
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.github/workflows/riscv64_vector.yml

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -140,10 +140,10 @@ jobs:
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while IFS= read -r -d $'\0' LOG; do cat $LOG ; FAILURES=1 ; done < <(grep -lZ FAIL ./test_out/*)
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if [[ ! -z $FAILURES ]]; then echo "==========" ; echo "== FAIL ==" ; echo "==========" ; echo ; exit 1 ; fi
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if [ "${{matrix.target}}" == "RISCV64_ZVL256B" ]; then
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test/test_shgemm &
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test/test_shgemv &
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test/test_bgemm &
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test/test_sbgemv
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qemu-riscv64 test/test_shgemm &
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qemu-riscv64 test/test_shgemv &
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qemu-riscv64 test/test_bgemm &
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qemu-riscv64 test/test_sbgemv
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fi
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