|
1 | 1 | from pathlib import Path |
2 | 2 | from vunit import VUnit |
3 | 3 |
|
4 | | -prj = VUnit.from_argv() |
5 | | -prj.add_osvvm() |
6 | | -root = Path(__file__).parent |
| 4 | +ROOT = Path(__file__).parent |
7 | 5 |
|
8 | | -lib = prj.add_library("lib") |
9 | | -lib.add_source_files(root / "litedram" / "extras" / "*.vhdl") |
10 | | -lib.add_source_files(root / "litedram" / "generated" / "sim" / "*.vhdl") |
| 6 | +PRJ = VUnit.from_argv() |
| 7 | +PRJ.add_osvvm() |
11 | 8 |
|
12 | | -# Use multiply.vhd and not xilinx-mult.vhd. Use VHDL-based random. |
13 | | -vhdl_files = root.glob("*.vhdl") |
14 | | -vhdl_files = [ |
| 9 | +PRJ.add_library("lib").add_source_files([ |
| 10 | + ROOT / "litedram" / "extras" / "*.vhdl", |
| 11 | + ROOT / "litedram" / "generated" / "sim" / "*.vhdl" |
| 12 | +] + [ |
15 | 13 | src_file |
16 | | - for src_file in vhdl_files |
17 | | - if ("xilinx-mult" not in src_file) |
18 | | - and ("foreign_random" not in src_file) |
19 | | - and ("nonrandom" not in src_file) |
20 | | -] |
21 | | -lib.add_source_files(vhdl_files) |
| 14 | + for src_file in ROOT.glob("*.vhdl") |
| 15 | + # Use multiply.vhd and not xilinx-mult.vhd. Use VHDL-based random. |
| 16 | + if not any(exclude in str(src_file) for exclude in ["xilinx-mult", "foreign_random", "nonrandom"]) |
| 17 | +]) |
22 | 18 |
|
23 | | -unisim = prj.add_library("unisim") |
24 | | -unisim.add_source_files(root / "sim-unisim" / "*.vhdl") |
| 19 | +PRJ.add_library("unisim").add_source_files(ROOT / "sim-unisim" / "*.vhdl") |
25 | 20 |
|
26 | | -prj.set_sim_option("disable_ieee_warnings", True) |
| 21 | +PRJ.set_sim_option("disable_ieee_warnings", True) |
27 | 22 |
|
28 | | -prj.main() |
| 23 | +PRJ.main() |
0 commit comments