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multiply_tb: Fix multiply_tb.vhdl for the new multiplier interface
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
1 parent b0aa534 commit 20f49f0

1 file changed

Lines changed: 34 additions & 42 deletions

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multiply_tb.vhdl

Lines changed: 34 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -26,15 +26,6 @@ architecture behave of multiply_tb is
2626
signal m1 : MultiplyInputType := MultiplyInputInit;
2727
signal m2 : MultiplyOutputType;
2828

29-
function absval(x: std_ulogic_vector) return std_ulogic_vector is
30-
begin
31-
if x(x'left) = '1' then
32-
return std_ulogic_vector(- signed(x));
33-
else
34-
return x;
35-
end if;
36-
end;
37-
3829
begin
3930
multiply_0: entity work.multiply
4031
generic map (PIPELINE_DEPTH => pipeline_depth)
@@ -51,7 +42,6 @@ begin
5142
stim_process: process
5243
variable ra, rb, rt, behave_rt: std_ulogic_vector(63 downto 0);
5344
variable si: std_ulogic_vector(15 downto 0);
54-
variable sign: std_ulogic;
5545
variable rnd : RandomPType;
5646
begin
5747
rnd.InitSeed(stim_process'path_name);
@@ -102,11 +92,11 @@ begin
10292

10393
behave_rt := ppc_mulld(ra, rb);
10494

105-
m1.data1 <= absval(ra);
106-
m1.data2 <= absval(rb);
107-
sign := ra(63) xor rb(63);
108-
m1.not_result <= sign;
109-
m1.addend <= (others => sign);
95+
m1.data1 <= ra;
96+
m1.data2 <= rb;
97+
m1.is_signed <= '1';
98+
m1.subtract <= '0';
99+
m1.addend <= (others => '0');
110100
m1.valid <= '1';
111101

112102
wait for clk_period;
@@ -128,7 +118,8 @@ begin
128118

129119
m1.data1 <= ra;
130120
m1.data2 <= rb;
131-
m1.not_result <= '0';
121+
m1.is_signed <= '0';
122+
m1.subtract <= '0';
132123
m1.addend <= (others => '0');
133124
m1.valid <= '1';
134125

@@ -149,11 +140,11 @@ begin
149140

150141
behave_rt := ppc_mulhd(ra, rb);
151142

152-
m1.data1 <= absval(ra);
153-
m1.data2 <= absval(rb);
154-
sign := ra(63) xor rb(63);
155-
m1.not_result <= sign;
156-
m1.addend <= (others => sign);
143+
m1.data1 <= ra;
144+
m1.data2 <= rb;
145+
m1.is_signed <= '1';
146+
m1.subtract <= '0';
147+
m1.addend <= (others => '0');
157148
m1.valid <= '1';
158149

159150
wait for clk_period;
@@ -173,13 +164,13 @@ begin
173164

174165
behave_rt := ppc_mullw(ra, rb);
175166

176-
m1.data1 <= (others => '0');
177-
m1.data1(31 downto 0) <= absval(ra(31 downto 0));
178-
m1.data2 <= (others => '0');
179-
m1.data2(31 downto 0) <= absval(rb(31 downto 0));
180-
sign := ra(31) xor rb(31);
181-
m1.not_result <= sign;
182-
m1.addend <= (others => sign);
167+
m1.data1 <= (others => ra(31));
168+
m1.data1(31 downto 0) <= ra(31 downto 0);
169+
m1.data2 <= (others => rb(31));
170+
m1.data2(31 downto 0) <= rb(31 downto 0);
171+
m1.is_signed <= '1';
172+
m1.subtract <= '0';
173+
m1.addend <= (others => '0');
183174
m1.valid <= '1';
184175

185176
wait for clk_period;
@@ -199,13 +190,13 @@ begin
199190

200191
behave_rt := ppc_mulhw(ra, rb);
201192

202-
m1.data1 <= (others => '0');
203-
m1.data1(31 downto 0) <= absval(ra(31 downto 0));
204-
m1.data2 <= (others => '0');
205-
m1.data2(31 downto 0) <= absval(rb(31 downto 0));
206-
sign := ra(31) xor rb(31);
207-
m1.not_result <= sign;
208-
m1.addend <= (others => sign);
193+
m1.data1 <= (others => ra(31));
194+
m1.data1(31 downto 0) <= ra(31 downto 0);
195+
m1.data2 <= (others => rb(31));
196+
m1.data2(31 downto 0) <= rb(31 downto 0);
197+
m1.is_signed <= '1';
198+
m1.subtract <= '0';
199+
m1.addend <= (others => '0');
209200
m1.valid <= '1';
210201

211202
wait for clk_period;
@@ -229,7 +220,8 @@ begin
229220
m1.data1(31 downto 0) <= ra(31 downto 0);
230221
m1.data2 <= (others => '0');
231222
m1.data2(31 downto 0) <= rb(31 downto 0);
232-
m1.not_result <= '0';
223+
m1.is_signed <= '0';
224+
m1.subtract <= '0';
233225
m1.addend <= (others => '0');
234226
m1.valid <= '1';
235227

@@ -250,12 +242,12 @@ begin
250242

251243
behave_rt := ppc_mulli(ra, si);
252244

253-
m1.data1 <= absval(ra);
254-
m1.data2 <= (others => '0');
255-
m1.data2(15 downto 0) <= absval(si);
256-
sign := ra(63) xor si(15);
257-
m1.not_result <= sign;
258-
m1.addend <= (others => sign);
245+
m1.data1 <= ra;
246+
m1.data2 <= (others => si(15));
247+
m1.data2(15 downto 0) <= si;
248+
m1.is_signed <= '1';
249+
m1.subtract <= '0';
250+
m1.addend <= (others => '0');
259251
m1.valid <= '1';
260252

261253
wait for clk_period;

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