fix: We mostly pass single step tests for 386 (#2135)

Author: kevinferrare

.github/copilot-instructions.md

@@ -110,6 +110,8 @@ Variants: `MemoryBasedDataStructureWithCsBaseAddress`, `MemoryBasedDataStructure
 
 ### Critical AI Agent Guidelines
 - **This is a C# project** - never suggest Python solutions
+- **No scripts outside the project** - do NOT create temporary scripts (Python, Bash, PowerShell, Node, etc.) anywhere on the filesystem, including `/tmp`, the user's home directory, or any location outside the workspace. Do not create throwaway helper scripts inside the workspace either. Use the available tools (file editing, grep, search, terminal one-liners) directly. If a multi-step computation is truly needed, run it as an inline shell one-liner in the terminal without writing a file.
+- **Use `tmp/` for temporary files** - if a temporary file must be written (e.g., captured command output, intermediate data), place it inside the `tmp/` folder at the root of the repository. Never write to `/tmp` or any path outside the workspace.
 - **Avoid complexity** - keep cyclomatic complexity low, prefer simple, linear code over nested conditionals
 - **No optional parameters** - avoid nullable or optional parameters in new code
 - **Minimal comments** - write self-documenting code with clear names; avoid obvious comments

.gitignore

@@ -397,3 +397,6 @@ spice86dump*.json
 spice86dump*.bin
 spice86dump*.asm
 spice86dump*.txt
+
+# workdir AI creates
+tmp/

clean.sh

@@ -0,0 +1,8 @@
+#!/usr/bin/env bash
+set -euo pipefail
+
+SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+cd "$SCRIPT_DIR"
+
+dotnet clean src/Spice86.sln
+find . -type d \( -name bin -o -name obj \) -exec rm -rf {} +

src/Spice86.Core/CLI/Configuration.cs

@@ -333,4 +333,12 @@ public sealed class Configuration : CommandSettings {
     [DefaultValue(JitMode.InterpretedThenCompiled)]
     public JitMode JitMode { get; init; }
 
+    /// <summary>
+    /// Controls whether an INT instruction whose IVT entry is 0:0 is treated as valid.
+    /// When true, execution continues at physical address 0. When false (default), a fatal exception is raised
+    /// to catch uninitialized IVT entries.
+    /// </summary>
+    [CommandOption("--AllowIvtAddress0")]
+    public bool AllowIvtAddress0 { get; init; }
+
 }

src/Spice86.Core/Emulator/CPU/Alu16.cs

@@ -34,6 +34,8 @@ public override ushort And(ushort value1, ushort value2) {
         UpdateFlags(res);
         _state.CarryFlag = false;
         _state.OverflowFlag = false;
+        // Undocumented: real CPUs clear AF for logical operations
+        _state.AuxiliaryFlag = false;
         return res;
     }
 
@@ -71,6 +73,8 @@ public override int Imul(short value1, short value2) {
         bool doesNotFitInWord = res != (short)res;
         _state.OverflowFlag = doesNotFitInWord;
         _state.CarryFlag = doesNotFitInWord;
+        UpdateFlags((ushort)res);
+        _state.AuxiliaryFlag = false;
         return res;
     }
 
@@ -94,8 +98,14 @@ public override ushort Or(ushort value1, ushort value2) {
     }
 
     public override ushort Rcl(ushort value, byte count) {
-        count = (byte) ((count & ShiftCountMask) % 17);
+        int maskedCount = count & ShiftCountMask;
+        if (maskedCount == 0) {
+            return value;
+        }
+
+        count = (byte)(maskedCount % 17);
         if (count == 0) {
+            _state.OverflowFlag = _state.CarryFlag ^ ((value & MsbMask) != 0);
             return value;
         }
 
@@ -115,8 +125,14 @@ public override ushort Rcl(ushort value, byte count) {
     }
 
     public override ushort Rcr(ushort value, int count) {
-        count = (count & ShiftCountMask) % 17;
+        int maskedCount = count & ShiftCountMask;
+        if (maskedCount == 0) {
+            return value;
+        }
+
+        count = maskedCount % 17;
         if (count == 0) {
+            SetOverflowForRigthRotate16(value);
             return value;
         }
 
@@ -135,31 +151,30 @@ public override ushort Rcr(ushort value, int count) {
     }
 
     public override ushort Rol(ushort value, byte count) {
-        count = (byte) ((count & ShiftCountMask) % 16);
-        if (count == 0) {
+        int maskedCount = count & ShiftCountMask;
+        if (maskedCount == 0) {
             return value;
         }
-
-        int carry = value >> 16 - count & 0x1;
-        ushort res = (ushort)(value << count);
-        res = (ushort)(res | value >> 16 - count);
-        _state.CarryFlag = carry != 0;
+        int effective = maskedCount % 16;
+        ushort res = effective == 0
+            ? value
+            : (ushort)((value << effective) | (value >> 16 - effective));
+        _state.CarryFlag = (res & 0x1) != 0;
         bool msb = (res & MsbMask) != 0;
         bool lsb = (res & 0x01) != 0;
         _state.OverflowFlag = msb ^ lsb;
         return res;
     }
     public override ushort Ror(ushort value, int count) {
-        count = (count & ShiftCountMask) % 16;
-        if (count == 0) {
+        int maskedCount = count & ShiftCountMask;
+        if (maskedCount == 0) {
             return value;
         }
-
-        int carry = value >> count - 1 & 0x1;
-        int mask = (1 << 16 - count) - 1;
-        ushort res = (ushort)(value >> count & mask);
-        res = (ushort)(res | value << 16 - count);
-        _state.CarryFlag = carry != 0;
+        int effective = maskedCount % 16;
+        ushort res = effective == 0
+            ? value
+            : (ushort)((value >> effective) | (value << 16 - effective));
+        _state.CarryFlag = (res & MsbMask) != 0;
         SetOverflowForRigthRotate16(res);
         return res;
     }
@@ -188,23 +203,28 @@ public override ushort Shl(ushort value, int count) {
         _state.CarryFlag = msbBefore != 0;
         ushort res = (ushort)(value << count);
         UpdateFlags(res);
-        _state.OverflowFlag = ((res ^ value) & MsbMask) != 0;
+        // See Alu8.Shl for the OF derivation rationale.
+        _state.OverflowFlag = ((res & MsbMask) != 0) ^ _state.CarryFlag;
         return res;
     }
 
     public override ushort Shld(ushort destination, ushort source, byte count) {
         count &= ShiftCountMask;
-        switch (count) {
-            case 0:
-                return destination;
-            case > 16:
-                // Undefined. We shift the source in again.
-                return (ushort)(source << (count - 16));
+        if (count == 0) {
+            return destination;
         }
 
+        // Real 386 behavior: for count <= 16 the documented SHLD formula applies;
+        // for count > 16 (the 5-bit mask allows up to 31) the destination is fully
+        // shifted out and the result equals ROL16(source, count - 16). Both branches
+        // are expressed as a 32-bit ROL on a paired value, taking the upper 16 bits.
+        uint combined = count > 16
+            ? ((uint)source << 16) | source
+            : ((uint)destination << 16) | source;
+        uint rotated = (combined << count) | (combined >> (32 - count));
         ushort msbBefore = (ushort)(destination & MsbMask);
-        _state.CarryFlag = (destination >> (16 - count) & 1) != 0;
-        ushort res = (ushort)((destination << count) | (source >> (16 - count)));
+        _state.CarryFlag = ((combined >> (32 - count)) & 1) != 0;
+        ushort res = (ushort)(rotated >> 16);
         UpdateFlags(res);
         ushort msb = (ushort)(res & MsbMask);
         _state.OverflowFlag = msb != msbBefore;
@@ -217,22 +237,16 @@ public override ushort Shrd(ushort destination, ushort source, byte count) {
             return destination;
         }
 
+        // Mirror of SHLD: for count > 16 the destination is fully shifted out and
+        // the result equals ROR16(source, count - 16). Expressed as a 32-bit ROR
+        // on a paired value, taking the lower 16 bits.
+        uint combined = count > 16
+            ? ((uint)source << 16) | source
+            : ((uint)source << 16) | destination;
+        uint rotated = (combined >> count) | (combined << (32 - count));
         ushort msbBefore = (ushort)(destination & MsbMask);
-        ushort res;
-
-        if (count > 16) {
-            // Undefined. We shift the source in again (opposite direction of SHLD).
-            int shiftFromSource = count - 16;
-            res = (ushort)(source >> shiftFromSource);
-
-            // Carry flag is the last bit shifted out of the 32-bit concatenation.
-            // For count > 16, this is bit (count - 17) of the source.
-            _state.CarryFlag = ((source >> (count - 17)) & 1) != 0;
-        } else {
-            _state.CarryFlag = ((destination >> (count - 1)) & 1) != 0;
-            res = (ushort)((destination >> count) | (source << (16 - count)));
-        }
-
+        _state.CarryFlag = ((combined >> (count - 1)) & 1) != 0;
+        ushort res = (ushort)rotated;
         UpdateFlags(res);
         ushort msb = (ushort)(res & MsbMask);
         _state.OverflowFlag = msb != msbBefore;
@@ -270,6 +284,8 @@ public override ushort Xor(ushort value1, ushort value2) {
         UpdateFlags(res);
         _state.CarryFlag = false;
         _state.OverflowFlag = false;
+        // Undocumented: real CPUs clear AF for logical operations
+        _state.AuxiliaryFlag = false;
         return res;
     }
 

src/Spice86.Core/Emulator/CPU/Alu32.cs

@@ -28,6 +28,8 @@ public override uint And(uint value1, uint value2) {
         UpdateFlags(res);
         _state.CarryFlag = false;
         _state.OverflowFlag = false;
+        // Undocumented: real CPUs clear AF for logical operations
+        _state.AuxiliaryFlag = false;
         return res;
     }
 
@@ -64,6 +66,8 @@ public override long Imul(int value1, int value2) {
         bool doesNotFitInDWord = res != (int)res;
         _state.OverflowFlag = doesNotFitInDWord;
         _state.CarryFlag = doesNotFitInDWord;
+        UpdateFlags((uint)res);
+        _state.AuxiliaryFlag = false;
         return res;
     }
 
@@ -93,17 +97,17 @@ public override uint Rcl(uint value, byte count) {
         }
 
         bool oldCarry = _state.CarryFlag;
-        uint carry = (value >> (32 - count)) & 0x1;
-        uint res = value << count;
-        uint mask = (1u << (count - 1)) - 1u;
-        res |= (value >> (33 - count)) & mask;
-        if (oldCarry) {
-            res |= 1u << (count - 1);
-        }
-
-        _state.CarryFlag = carry != 0;
+        // Build a 33-bit value [carry][value] and rotate left by count.
+        // Using ulong avoids the C# 32-bit shift mask that would otherwise
+        // turn `value << 32` into `value << 0` for count==1 etc.
+        ulong v = ((oldCarry ? 1UL : 0UL) << 32) | value;
+        ulong rotated = ((v << count) | (v >> (33 - count))) & ((1UL << 33) - 1UL);
+        uint res = (uint)rotated;
+        bool newCarry = (rotated & (1UL << 32)) != 0;
+
+        _state.CarryFlag = newCarry;
         bool msb = (res & MsbMask) != 0;
-        _state.OverflowFlag = _state.CarryFlag ^ msb;
+        _state.OverflowFlag = newCarry ^ msb;
         return res;
     }
 
@@ -114,15 +118,13 @@ public override uint Rcr(uint value, int count) {
         }
 
         bool oldCarry = _state.CarryFlag;
-        uint carry = (value >> (count - 1)) & 0x1;
-        uint mask = (1u << (32 - count)) - 1u;
-        uint res = (value >> count) & mask;
-        res |= value << (33 - count);
-        if (oldCarry) {
-            res |= 1u << (32 - count);
-        }
+        // Build a 33-bit value [carry][value] and rotate right by count.
+        ulong v = ((oldCarry ? 1UL : 0UL) << 32) | value;
+        ulong rotated = ((v >> count) | (v << (33 - count))) & ((1UL << 33) - 1UL);
+        uint res = (uint)rotated;
+        bool newCarry = (rotated & (1UL << 32)) != 0;
 
-        _state.CarryFlag = carry != 0;
+        _state.CarryFlag = newCarry;
         SetOverflowForRigthRotate32(res);
         return res;
     }
@@ -182,7 +184,8 @@ public override uint Shl(uint value, int count) {
         _state.CarryFlag = msbBefore != 0;
         uint res = value << count;
         UpdateFlags(res);
-        _state.OverflowFlag = ((res ^ value) & MsbMask) != 0;
+        // See Alu8.Shl for the OF derivation rationale.
+        _state.OverflowFlag = ((res & MsbMask) != 0) ^ _state.CarryFlag;
         return res;
     }
 
@@ -248,6 +251,8 @@ public override uint Xor(uint value1, uint value2) {
         UpdateFlags(res);
         _state.CarryFlag = false;
         _state.OverflowFlag = false;
+        // Undocumented: real CPUs clear AF for logical operations
+        _state.AuxiliaryFlag = false;
         return res;
     }