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arcane-quillarcane-quill
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ume: Add more values for interpolation #757 
1 parent 0ae6c13 commit f54e597

4 files changed

Lines changed: 129 additions & 81 deletions

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‎vadl/main/resources/templates/iss/linux-user/gen-arch/cpu_loop.c‎

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -53,33 +53,37 @@ void cpu_loop(CPU[(${gen_arch_upper})]State *env)
5353
cpu_exec_step_atomic(cs);
5454
break;
5555
case [(${gen_arch_upper})]_EXCP_EXC:
56-
cause = env->arg_exc_cause;
56+
cause = env->[(${config.excCauseVar})];
5757
switch (cause) {
58-
case [(${gen_arch_upper})]_EXC_ECALL:
58+
case [(${gen_arch_upper})]_EXC_[(${config.SYSCALL_NAME})]:
5959
env->[(${pc_reg.name_lower})] += [(${config.insn_width_bytes})];
60+
[# th:if="${config.hasIcacheFlush}"]
6061
if (env->[(${register_tensors[0].name_lower})][ [(${config.sysReg})] ] == TARGET_NR_[(${gen_arch_lower})]_flush_icache) {
6162
/* no-op in QEMU; TB invalidation is automatic */
6263
ret = 0;
6364
} else {
65+
[/]
6466
ret = do_syscall(env,
6567
env->[(${register_tensors[0].name_lower})][ [(${config.sysReg})] ],
6668
[# th:each="arg : ${config.args}"]
6769
env->[(${register_tensors[0].name_lower})][ [(${arg})] ],
6870
[/]
6971
0, 0);
72+
[# th:if="${config.hasIcacheFlush}"]
7073
}
74+
[/]
7175
if (ret == -QEMU_ERESTARTSYS) {
72-
env->[(${pc_reg.name_lower})] -= 4;
76+
env->[(${pc_reg.name_lower})] -= [(${config.insn_width_bytes})];;
7377
} else if (ret != -QEMU_ESIGRETURN) {
7478
env->[(${register_tensors[0].name_lower})][ [(${config.retReg})] ] = ret; }
7579
if (cs->singlestep_enabled) {
7680
goto gdbstep;
7781
}
7882
break;
79-
case [(${gen_arch_upper})]_EXC_ILLEGAL_INSTR:
83+
case [(${gen_arch_upper})]_EXC_[(${config.ILLEGAL_INSTR_NAME})]:
8084
force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->[(${pc_reg.name_lower})]);
8185
break;
82-
case [(${gen_arch_upper})]_EXC_BREAKPOINT:
86+
case [(${gen_arch_upper})]_EXC_[(${config.BREAKPOINT_NAME})]:
8387
case EXCP_DEBUG:
8488
gdbstep:
8589
force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->[(${pc_reg.name_lower})]);
@@ -109,8 +113,8 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
109113
TaskState *ts = get_task_state(cpu);
110114
struct image_info *info = ts->info;
111115

112-
env->[(${pc_reg.name_lower})] = regs->sepc;
113-
env->[(${register_tensors[0].name_lower})][ [(${config.spReg})] ] = regs->sp;
116+
env->[(${pc_reg.name_lower})] = regs->[(${config.ptRegPc})];
117+
env->[(${register_tensors[0].name_lower})][ [(${config.spReg})] ] = regs->[(${config.ptRegSp})];
114118

115119
ts->stack_base = info->start_stack;
116120
}

‎vadl/main/vadl/iss/passes/UmeTemplateRenderingPass.java‎

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,14 +16,13 @@
1616

1717
package vadl.iss.passes;
1818

19-
import java.util.List;
2019
import java.util.Map;
2120
import vadl.configuration.IssConfiguration;
22-
import vadl.iss.passes.extensions.UmeInfo;
2321
import vadl.iss.template.IssTemplateRenderingPass;
2422
import vadl.pass.PassName;
2523
import vadl.pass.PassResults;
2624
import vadl.viam.Specification;
25+
import vadl.viam.UserModeEmulation;
2726

2827
public class UmeTemplateRenderingPass extends IssTemplateRenderingPass {
2928

@@ -52,7 +51,7 @@ protected Map<String, Object> createVariables(PassResults passResults, Specifica
5251
// var umeDef = specification.userModeEmulation().get();
5352

5453
//TODO remove hardcoded values (finish vadl with ume)
55-
int extractedSysReg = 17;
54+
/* int extractedSysReg = 17;
5655
int extractedRetReg = 10;
5756
int extractedSpReg = 2;
5857
int extractedRaReg = 1;
@@ -65,9 +64,22 @@ protected Map<String, Object> createVariables(PassResults passResults, Specifica
6564
);
6665
6766
vars.put("config", new UmeInfo(extractedSysReg, extractedRetReg, extractedSpReg, extractedRaReg, extractedTpReg, extractedArgs, extractedExcIds));
68-
vars.put("insn_width_bytes", 4);
67+
vars.put("insn_width_bytes", 4); */
6968
// }
7069

70+
/*specification.definitions()
71+
.filter(UserModeEmulation.class::isInstance)
72+
.map(UserModeEmulation.class::cast)
73+
.findFirst()
74+
.ifPresent(ume -> {
75+
vars.put("config", ume);
76+
vars.put("insn_width_bytes", 4); // or get from elsewhere if needed
77+
});*/
78+
79+
UserModeEmulation ume = UserModeEmulation.createDefault();
80+
vars.put("config", ume.asMap());
81+
vars.put("insn_width_bytes", 4); // or get from elsewhere if needed
82+
7183
return vars;
7284
}
7385
}

‎vadl/main/vadl/iss/passes/extensions/UmeInfo.java‎

Lines changed: 0 additions & 49 deletions
This file was deleted.

‎vadl/main/vadl/viam/UserModeEmulation.java‎

Lines changed: 102 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -18,63 +18,144 @@
1818

1919
import java.util.List;
2020
import java.util.Map;
21+
import vadl.utils.SourceLocation;
2122

2223
public class UserModeEmulation extends Definition {
23-
private final int sysReg; // e.g., 17 for RISC-V a7 (syscall number)
24-
private final int retReg; // e.g., 10 for RISC-V a0 (return value)
25-
private final int spReg; // Stack Pointer (e.g., 2 for RISC-V)
26-
private final int raReg; // Return Address (e.g., 1 for RISC-V)
27-
private final int tpReg; // Thread Pointer
28-
private final List<Integer> args; // Argument registers (e.g., [10, 11, 12, 13, 14, 15])
29-
private final Map<String, Integer> excIds; // Exception IDs mapping
24+
/**
25+
* Returns a map representation of this UserModeEmulation for template rendering.
26+
*/
27+
public Map<String, Object> asMap() {
28+
return Map.ofEntries(
29+
Map.entry("sysReg", sysReg),
30+
Map.entry("retReg", retReg),
31+
Map.entry("spReg", spReg),
32+
Map.entry("raReg", raReg),
33+
Map.entry("tpReg", tpReg),
34+
Map.entry("args", args),
35+
Map.entry("excIds", excIds),
36+
Map.entry("SYSCALL_NAME", syscallExcName),
37+
Map.entry("BREAKPOINT_NAME", breakpointExcName),
38+
Map.entry("ILLEGAL_INSTR_NAME", illegalInstrExcName),
39+
// NEW FIELDS FOR CPU_LOOP.C:
40+
Map.entry("ptRegPc", ptRegPc),
41+
Map.entry("ptRegSp", ptRegSp),
42+
Map.entry("excCauseVar", excCauseVar),
43+
Map.entry("hasIcacheFlush", hasIcacheFlush)
44+
);
45+
}
46+
47+
private final int sysReg;
48+
private final int retReg;
49+
private final int spReg;
50+
private final int raReg;
51+
private final int tpReg;
52+
private final List<Integer> args;
53+
private final Map<String, Integer> excIds;
54+
private final String syscallExcName;
55+
private final String breakpointExcName;
56+
private final String illegalInstrExcName;
57+
// NEW FIELDS:
58+
private final String ptRegPc;
59+
private final String ptRegSp;
60+
private final String excCauseVar;
61+
private final boolean hasIcacheFlush;
3062

3163
/**
3264
* Constructs a UserModeEmulation configuration.
3365
*/
3466
public UserModeEmulation(
3567
Identifier identifier,
36-
int sysReg,
37-
int retReg,
38-
int spReg,
39-
int raReg,
40-
int tpReg,
41-
List<Integer> args,
42-
Map<String, Integer> excIds) {
68+
int sysReg, int retReg, int spReg, int raReg, int tpReg,
69+
List<Integer> args, Map<String, Integer> excIds,
70+
String syscallExcName, String breakpointExcName, String illegalInstrExcName,
71+
String ptRegPc, String ptRegSp, String excCauseVar, boolean hasIcacheFlush) {
4372
super(identifier);
73+
if (args == null || args.isEmpty()) throw new IllegalArgumentException("args must not be null/empty");
74+
if (excIds == null || excIds.isEmpty()) throw new IllegalArgumentException("excIds must not be null/empty");
75+
4476
this.sysReg = sysReg;
4577
this.retReg = retReg;
4678
this.spReg = spReg;
4779
this.raReg = raReg;
4880
this.tpReg = tpReg;
4981
this.args = args;
5082
this.excIds = excIds;
83+
this.syscallExcName = syscallExcName;
84+
this.breakpointExcName = breakpointExcName;
85+
this.illegalInstrExcName = illegalInstrExcName;
86+
this.ptRegPc = ptRegPc;
87+
this.ptRegSp = ptRegSp;
88+
this.excCauseVar = excCauseVar;
89+
this.hasIcacheFlush = hasIcacheFlush;
90+
}
91+
92+
public static UserModeEmulation createDefault() {
93+
Identifier identifier = new Identifier(new String[]{"ume"}, SourceLocation.INVALID_SOURCE_LOCATION);
94+
Map<String, Integer> excIds = Map.of("ILLEGAL_INSTR", 2, "BREAKPOINT", 3, "ECALL", 11);
95+
96+
return new UserModeEmulation(
97+
identifier,
98+
17, 10, 2, 1, 4,
99+
List.of(10, 11, 12, 13, 14, 15),
100+
excIds,
101+
"ECALL", "BREAKPOINT", "ILLEGAL_INSTR",
102+
"sepc", "sp", "arg_exc_cause", true
103+
);
104+
}
105+
106+
public String getPtRegPc() {
107+
return ptRegPc;
108+
}
109+
110+
public String getPtRegSp() {
111+
return ptRegSp;
112+
}
113+
114+
public String getExcCauseVar() {
115+
return excCauseVar;
116+
}
117+
118+
public boolean hasIcacheFlush() {
119+
return hasIcacheFlush;
120+
}
121+
122+
public String getSyscallExcName() {
123+
return syscallExcName;
124+
}
125+
126+
public String getBreakpointExcName() {
127+
return breakpointExcName;
128+
}
129+
130+
public String getIllegalInstrExcName() {
131+
return illegalInstrExcName;
51132
}
52133

53-
public int sysReg() {
134+
public int getSysReg() {
54135
return sysReg;
55136
}
56137

57-
public int retReg() {
138+
public int getRetReg() {
58139
return retReg;
59140
}
60141

61-
public int spReg() {
142+
public int getSpReg() {
62143
return spReg;
63144
}
64145

65-
public int raReg() {
146+
public int getRaReg() {
66147
return raReg;
67148
}
68149

69-
public int tpReg() {
150+
public int getTpReg() {
70151
return tpReg;
71152
}
72153

73-
public List<Integer> args() {
154+
public List<Integer> getArgs() {
74155
return args;
75156
}
76157

77-
public Map<String, Integer> excIds() {
158+
public Map<String, Integer> getExcIds() {
78159
return excIds;
79160
}
80161

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