Fix multi channel difftest support and area cost#33
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- MultiChannelsAML correctly records amu finish event
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Pull request overview
This PR updates the multi-channel loader/bridge datapaths to both (a) fix difftest indexing behavior for AB multi-channel loaders and (b) reduce area by parameterizing queue depths, splitting payload/meta storage, and optionally bypassing the CStore response-bridge ack routing network.
Changes:
- Refactors
ResponseChannelBridgeto use a parameterizedqueueDepth, optionally drop the data payload, and split data/meta queues. - Refactors multi-channel AML/CML internal FIFOs into separate data/meta queues with configurable depths, plus adds an aggressive CStore direct-ack counting mode (enabled by default).
- Updates/extends unit tests and parameters to reflect the new configuration surface and difftest lane count derivation.
Reviewed changes
Copilot reviewed 7 out of 7 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| src/test/scala/cute/ResponseChannelBridgeSpec.scala | Updates bridge instantiation to use queueDepth and hasDataPayload. |
| src/test/scala/cute/CMLBridgeConfigSpec.scala | Adds assertions/tests for derived CStore difftest lane count. |
| src/main/scala/ResponseChannelBridge.scala | Reworks bridge buffering: queueDepth, optional payload, split meta/data queues. |
| src/main/scala/MultiChannelsCML.scala | Splits fill queues, adds direct CStore ack counting/bypass path. |
| src/main/scala/MultiChannelsAML.scala | Splits per-bank response FIFOs and fixes difftest index selection for AML/BML. |
| src/main/scala/CUTETOP.scala | Updates bridge wiring, adds request-channel helper, and adds CStore direct-ack bypass wiring. |
| src/main/scala/CUTEParameters.scala | Introduces new queue-depth params and CStoreDirectAckCountMode (default on). |
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| val StoreAckDone = Mux( | ||
| CStoreDirectAckCountMode.B, | ||
| DirectAckResponseCount === Max_Store_Memory_Time, | ||
| WriteResponseCountSum === Max_Store_Memory_Time | ||
| ) |
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| val ackCanAccept = DirectAckResponseCount =/= Max_Store_Memory_Time | ||
| for (bank <- 0 until Matrix_MN) { | ||
| ackReadies(bank) := ackCanAccept | ||
| io.StoreLocalMMUIO.Response(bank).ready := ackReadies(bank) | ||
| directAckFireVec(bank) := io.StoreLocalMMUIO.Response(bank).fire | ||
| } | ||
| val firedAckCount = PopCount(directAckFireVec) | ||
| when(firedAckCount =/= 0.U) { | ||
| DirectAckResponseCount := DirectAckResponseCount + firedAckCount | ||
| if (YJPCMLDebugEnable) { | ||
| printf( | ||
| cf"[CMemoryLoader_Store<${io.DebugInfo.DebugTimeStampe}>][DirectAck] " + | ||
| cf"ackFireVec=${directAckFireVec.asUInt} ackInc=${firedAckCount} " + | ||
| cf"totalAck=${DirectAckResponseCount + firedAckCount}/${Max_Store_Memory_Time}\n" | ||
| ) | ||
| } |
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| val diffIndexMap = Map( | ||
| "AML" -> 0, | ||
| "BML" -> 1 | ||
| ) | ||
| difftestAmuFinish.index := diffIndexMap.getOrElse(label, 0xdeadabab).U |
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Difftest
Area