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hoffstadthoffstadt
committed
wip
1 parent 627aa83 commit 33d50ef

9 files changed

Lines changed: 628 additions & 1249 deletions

‎examples/example_gfx_4.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -435,13 +435,13 @@ pl_app_update(plAppData* ptAppData)
435435
.tHandle = ptAppData->tColorTexture,
436436
.tStages = PL_SHADER_STAGE_FRAGMENT | PL_SHADER_STAGE_VERTEX,
437437
.tAccess = PL_PASS_RESOURCE_ACCESS_WRITE,
438-
.tRole = PL_PASS_RESOURCE_ROLE_ATTACHMENT
438+
.eUsage = PL_PASS_RESOURCE_ROLE_ATTACHMENT
439439
},
440440
{
441441
.tHandle = ptAppData->tDepthTexture,
442442
.tStages = PL_SHADER_STAGE_FRAGMENT | PL_SHADER_STAGE_VERTEX,
443443
.tAccess = PL_PASS_RESOURCE_ACCESS_WRITE,
444-
.tRole = PL_PASS_RESOURCE_ROLE_ATTACHMENT
444+
.eUsage = PL_PASS_RESOURCE_ROLE_ATTACHMENT
445445
}
446446
};
447447
plPassResources tResources = {

‎extensions/pl_graphics_ext.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -528,6 +528,7 @@ pl__cleanup_common_swapchain(plSwapchain* ptSwapchain)
528528
static void
529529
pl__cleanup_common_device(plDevice* ptDevice)
530530
{
531+
pl_sb_free(ptDevice->sbtBarrierStack);
531532
pl_sb_free(ptDevice->sbtMemoryBlocks);
532533
pl_sb_free(ptDevice->sbtShadersCold);
533534
pl_sb_free(ptDevice->sbtBuffersCold);
@@ -963,9 +964,6 @@ pl_load_graphics_ext(plApiRegistryI* ptApiRegistry, bool bReload)
963964
.return_command_buffer = pl_graphics_return_command_buffer,
964965
.reset_command_buffer = pl_graphics_reset_command_buffer,
965966
.begin_render_pass = pl_graphics_begin_render_pass,
966-
.set_roles = pl_graphics_set_roles,
967-
.reset_roles = pl_graphics_reset_roles,
968-
.change_texture_role = pl_graphics_change_texture_role,
969967
.end_render_pass = pl_graphics_end_render_pass,
970968
.begin_compute_pass = pl_graphics_begin_compute_pass,
971969
.end_compute_pass = pl_graphics_end_compute_pass,

‎extensions/pl_graphics_ext.h‎

Lines changed: 10 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,8 @@ extern "C" {
101101
//-----------------------------------------------------------------------------
102102

103103
// misc config options
104+
#define PL_MAX_PASS_RESOURCE_BUFFERS 16
105+
#define PL_MAX_PASS_RESOURCE_TEXTURES 16
104106
#define PL_MAX_BUFFERS_PER_BIND_GROUP 32
105107
#define PL_MAX_TEXTURES_PER_BIND_GROUP 32
106108
#define PL_MAX_SAMPLERS_PER_BIND_GROUP 8
@@ -247,7 +249,6 @@ typedef int plVertexFormat; // -> enum _plVertexFormat // En
247249
typedef int plBufferUsage; // -> enum _plBufferUsage // Flag: buffer usage flags (PL_BUFFER_USAGE_XXXX)
248250
typedef int plShaderStageFlags; // -> enum _plShaderStageFlags // Flag: GPU pipeline stage (PL_SHADER_STAGE_XXXX)
249251
typedef int plPassResourceAccess; // -> enum _plPassResourceAccess // Flag:
250-
typedef int plPassResourceRole; // -> enum _plPassResourceRole // Flag:
251252
typedef int plBarrierScope; // -> enum _plBarrierScope // Flag:
252253
typedef int plPipelineStageFlags; // -> enum _plPipelineStageFlags // Flag: GPU pipeline stage (PL_PIPELINE_STAGE_XXXX)
253254
typedef int plCullMode; // -> enum _plCullMode // Flag: face culling mode (PL_CULL_MODE_XXXX)
@@ -452,7 +453,7 @@ PL_API void pl_graphics_generate_mipmaps (plCommandBuffer*, plTextureHand
452453
PL_API void pl_graphics_copy_buffer (plCommandBuffer*, plBufferHandle source, plBufferHandle destination, uint64_t sourceOffset, uint64_t destinationOffset, size_t);
453454

454455
// barriers
455-
PL_API void pl_graphics_intra_pass_barrier(plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
456+
PL_API void pl_graphics_intra_pass_barrier(plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope, const plPassResources*);
456457
PL_API void pl_graphics_consumer_barrier (plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
457458
PL_API void pl_graphics_producer_barrier (plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
458459

@@ -608,11 +609,8 @@ typedef struct _plGraphicsI
608609
void (*submit_command_buffer) (plCommandBuffer*, const plSubmitInfo*);
609610

610611
// render encoder
611-
void (*begin_render_pass) (plCommandBuffer*, plRenderInfo, const plPassResources*); // do not store
612-
void (*reset_roles) (plCommandBuffer*);
613-
void (*set_roles) (plCommandBuffer*, const plPassResources*);
614-
void (*end_render_pass) (plCommandBuffer*);
615-
void (*change_texture_role)(plCommandBuffer*, plTextureHandle, plPassResourceRole, plPassResourceAccess, plPassResourceRole, plPassResourceAccess);
612+
void (*begin_render_pass)(plCommandBuffer*, plRenderInfo, const plPassResources*);
613+
void (*end_render_pass) (plCommandBuffer*);
616614

617615
// render encoder: draw stream (preferred system)
618616
// Notes:
@@ -648,7 +646,7 @@ typedef struct _plGraphicsI
648646
void (*copy_buffer) (plCommandBuffer*, plBufferHandle source, plBufferHandle destination, uint64_t sourceOffset, uint64_t destinationOffset, size_t);
649647

650648
// barriers
651-
void (*intra_pass_barrier)(plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
649+
void (*intra_pass_barrier)(plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope, const plPassResources*);
652650
void (*consumer_barrier) (plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
653651
void (*producer_barrier) (plCommandBuffer*, plPipelineStageFlags srcStages, plPipelineStageFlags dstStages, plBarrierScope);
654652

@@ -957,25 +955,23 @@ typedef struct _plBindGroupUpdateData
957955
typedef struct _plPassTextureResource
958956
{
959957
plTextureHandle tHandle;
960-
plPassResourceRole tRole;
958+
plTextureUsage eUsage;
961959
plPassResourceAccess tAccess;
962960
plPipelineStageFlags tStages;
963961
} plPassTextureResource;
964962

965963
typedef struct _plPassBufferResource
966964
{
967965
plBufferHandle tHandle;
968-
plPassResourceRole tRole;
966+
plBufferUsage eUsage;
969967
plPassResourceAccess tAccess;
970968
plPipelineStageFlags tStages;
971969
} plPassBufferResource;
972970

973971
typedef struct _plPassResources
974972
{
975-
uint32_t uBufferCount;
976-
uint32_t uTextureCount;
977-
const plPassBufferResource* atBuffers;
978-
const plPassTextureResource* atTextures;
973+
plPassBufferResource atBuffers[PL_MAX_PASS_RESOURCE_BUFFERS];
974+
plPassTextureResource atTextures[PL_MAX_PASS_RESOURCE_TEXTURES];
979975
} plPassResources;
980976

981977
typedef struct _plBindGroupLayoutDesc
@@ -1525,17 +1521,6 @@ enum _plPassResourceAccess
15251521
PL_PASS_RESOURCE_ACCESS_READ_WRITE = PL_PASS_RESOURCE_ACCESS_READ | PL_PASS_RESOURCE_ACCESS_WRITE
15261522
};
15271523

1528-
enum _plPassResourceRole
1529-
{
1530-
PL_PASS_RESOURCE_ROLE_NONE = 0,
1531-
PL_PASS_RESOURCE_ROLE_SHADER = 1 << 0, // sampled texture, uniform/storage buffer read
1532-
PL_PASS_RESOURCE_ROLE_STORAGE = 1 << 1, // storage texture/buffer read/write
1533-
PL_PASS_RESOURCE_ROLE_ATTACHMENT = 1 << 2, // render target/depth
1534-
PL_PASS_RESOURCE_ROLE_TRANSFER = 1 << 3, // copy/mipmap
1535-
PL_PASS_RESOURCE_ROLE_PRESENT = 1 << 4,
1536-
PL_PASS_RESOURCE_ROLE_INPUT_ATTACHMENT = 1 << 5,
1537-
};
1538-
15391524
enum _plCullMode
15401525
{
15411526
PL_CULL_MODE_NONE = 0,

‎extensions/pl_graphics_internal.h‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,13 @@ typedef struct _plFrameGarbage
5252
plDeviceMemoryAllocation* sbtMemory;
5353
} plFrameGarbage;
5454

55+
typedef struct _plStackedBarrier
56+
{
57+
plPipelineStageFlags tSrcStages;
58+
plPipelineStageFlags tDstStages;
59+
plBarrierScope tScope;
60+
} plStackedBarrier;
61+
5562
typedef struct _plFrameContext plFrameContext;
5663

5764
//-----------------------------------------------------------------------------

‎extensions/pl_graphics_metal.m‎

Lines changed: 39 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,7 @@
217217

218218
id<MTL4ArgumentTable> tArgumentTable;
219219
id<MTLResidencySet> tResidencySet;
220+
plStackedBarrier* sbtBarrierStack;
220221
} plDevice;
221222

222223
typedef struct _plSwapchain
@@ -1841,42 +1842,48 @@
18411842

18421843
return true;
18431844
}
1844-
void
1845-
pl_graphics_change_texture_role(plCommandBuffer* ptCmdBuffer, plTextureHandle tTexture, plPassResourceRole tOldRole,
1846-
plPassResourceAccess tOldAccess, plPassResourceRole tNewRole, plPassResourceAccess tNewAccess)
1845+
1846+
static void
1847+
pl__graphics_consumer_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope)
18471848
{
1848-
// plDevice* ptDevice = ptCmdBuffer->ptDevice;
1849-
// PL_ASSERT(gptGraphics->bEncoderActive);
1850-
// // PL_ASSERT(tSrcStages != 0);
1851-
// // PL_ASSERT(tDstStages != 0);
1849+
plDevice* ptDevice = ptCmdBuffer->ptDevice;
18521850

1853-
// MTLStages tSrcStage = MTLStageVertex | MTLStageFragment;
1854-
// MTLStages tDstStage = MTLStageVertex | MTLStageFragment;
1855-
// MTL4VisibilityOptions tOptions = MTL4VisibilityOptionDevice;
1851+
MTLStages tSrcStage = 0;
1852+
MTLStages tDstStage = 0;
1853+
MTL4VisibilityOptions tOptions = MTL4VisibilityOptionNone;
18561854

1857-
// // if(tScope != 0) tOptions = MTL4VisibilityOptionDevice;
1855+
if(tScope != 0) tOptions = MTL4VisibilityOptionDevice;
18581856

1859-
// // if(tSrcStages & PL_PIPELINE_STAGE_COMPUTE) tSrcStage |= MTLStageDispatch;
1860-
// // if(tSrcStages & PL_PIPELINE_STAGE_BLIT) tSrcStage |= MTLStageBlit;
1861-
// // if(tSrcStages & PL_PIPELINE_STAGE_VERTEX) tSrcStage |= MTLStageVertex;
1862-
// // if(tSrcStages & PL_PIPELINE_STAGE_FRAGMENT) tSrcStage |= MTLStageFragment;
1857+
if(tSrcStages & PL_PIPELINE_STAGE_COMPUTE) tSrcStage |= MTLStageDispatch;
1858+
if(tSrcStages & PL_PIPELINE_STAGE_BLIT) tSrcStage |= MTLStageBlit;
1859+
if(tSrcStages & PL_PIPELINE_STAGE_VERTEX) tSrcStage |= MTLStageVertex;
1860+
if(tSrcStages & PL_PIPELINE_STAGE_FRAGMENT) tSrcStage |= MTLStageFragment;
18631861

1864-
// // if(tDstStages & PL_PIPELINE_STAGE_COMPUTE) tDstStage |= MTLStageDispatch;
1865-
// // if(tDstStages & PL_PIPELINE_STAGE_BLIT) tDstStage |= MTLStageBlit;
1866-
// // if(tDstStages & PL_PIPELINE_STAGE_VERTEX) tDstStage |= MTLStageVertex;
1867-
// // if(tDstStages & PL_PIPELINE_STAGE_FRAGMENT) tDstStage |= MTLStageFragment;
1862+
if(tDstStages & PL_PIPELINE_STAGE_COMPUTE) tDstStage |= MTLStageDispatch;
1863+
if(tDstStages & PL_PIPELINE_STAGE_BLIT) tDstStage |= MTLStageBlit;
1864+
if(tDstStages & PL_PIPELINE_STAGE_VERTEX) tDstStage |= MTLStageVertex;
1865+
if(tDstStages & PL_PIPELINE_STAGE_FRAGMENT) tDstStage |= MTLStageFragment;
18681866

1869-
// [ptDevice->tRenderEncoder barrierAfterEncoderStages:tSrcStage beforeEncoderStages:tDstStage visibilityOptions:tOptions];
1867+
if(gptGraphics->bComputeEncoderActive)
1868+
[ptDevice->tComputeEncoder barrierAfterQueueStages:tSrcStage beforeStages:tDstStage visibilityOptions:tOptions];
1869+
else if(gptGraphics->bRenderEncoderActive)
1870+
[ptDevice->tRenderEncoder barrierAfterQueueStages:tSrcStage beforeStages:tDstStage visibilityOptions:tOptions];
18701871
}
18711872

18721873
void
1873-
pl_graphics_reset_roles(plCommandBuffer* ptCmdBuffer)
1874+
pl_graphics_consumer_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope)
18741875
{
1875-
}
1876+
plDevice* ptDevice = ptCmdBuffer->ptDevice;
1877+
PL_ASSERT(gptGraphics->bRenderEncoderActive || gptGraphics->bComputeEncoderActive);
1878+
PL_ASSERT(tSrcStages != 0);
1879+
PL_ASSERT(tDstStages != 0);
18761880

1877-
void
1878-
pl_graphics_set_roles(plCommandBuffer* ptCmdBuffer, const plPassResources* ptResources)
1879-
{
1881+
plStackedBarrier tBarrier = {
1882+
.tSrcStages = tSrcStages,
1883+
.tDstStages = tDstStages,
1884+
.tScope = tScope
1885+
};
1886+
pl_sb_push(ptCmdBuffer->ptDevice->sbtBarrierStack, tBarrier);
18801887
}
18811888

18821889
void
@@ -1949,6 +1956,12 @@
19491956
{
19501957
ptDevice->ptRenderPassDescriptor.stencilAttachment.loadAction = MTLLoadActionLoad;
19511958
}
1959+
1960+
while(pl_sb_size(ptDevice->sbtBarrierStack) > 0)
1961+
{
1962+
plStackedBarrier tBarrier = pl_sb_pop(ptDevice->sbtBarrierStack);
1963+
pl__graphics_consumer_barrier(ptCmdBuffer, tBarrier.tSrcStages, tBarrier.tDstStages, tBarrier.tScope);
1964+
}
19521965
}
19531966

19541967
void
@@ -2051,7 +2064,7 @@
20512064
}
20522065

20532066
void
2054-
pl_graphics_intra_pass_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope)
2067+
pl_graphics_intra_pass_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope, const plPassResources* ptResources)
20552068
{
20562069
plDevice* ptDevice = ptCmdBuffer->ptDevice;
20572070
PL_ASSERT(gptGraphics->bRenderEncoderActive || gptGraphics->bComputeEncoderActive);
@@ -2099,36 +2112,6 @@
20992112
return ptDevice->ptRenderPassDescriptor;
21002113
}
21012114

2102-
void
2103-
pl_graphics_consumer_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope)
2104-
{
2105-
plDevice* ptDevice = ptCmdBuffer->ptDevice;
2106-
PL_ASSERT(gptGraphics->bRenderEncoderActive || gptGraphics->bComputeEncoderActive);
2107-
PL_ASSERT(tSrcStages != 0);
2108-
PL_ASSERT(tDstStages != 0);
2109-
2110-
MTLStages tSrcStage = 0;
2111-
MTLStages tDstStage = 0;
2112-
MTL4VisibilityOptions tOptions = MTL4VisibilityOptionNone;
2113-
2114-
if(tScope != 0) tOptions = MTL4VisibilityOptionDevice;
2115-
2116-
if(tSrcStages & PL_PIPELINE_STAGE_COMPUTE) tSrcStage |= MTLStageDispatch;
2117-
if(tSrcStages & PL_PIPELINE_STAGE_BLIT) tSrcStage |= MTLStageBlit;
2118-
if(tSrcStages & PL_PIPELINE_STAGE_VERTEX) tSrcStage |= MTLStageVertex;
2119-
if(tSrcStages & PL_PIPELINE_STAGE_FRAGMENT) tSrcStage |= MTLStageFragment;
2120-
2121-
if(tDstStages & PL_PIPELINE_STAGE_COMPUTE) tDstStage |= MTLStageDispatch;
2122-
if(tDstStages & PL_PIPELINE_STAGE_BLIT) tDstStage |= MTLStageBlit;
2123-
if(tDstStages & PL_PIPELINE_STAGE_VERTEX) tDstStage |= MTLStageVertex;
2124-
if(tDstStages & PL_PIPELINE_STAGE_FRAGMENT) tDstStage |= MTLStageFragment;
2125-
2126-
if(gptGraphics->bComputeEncoderActive)
2127-
[ptDevice->tComputeEncoder barrierAfterQueueStages:tSrcStage beforeStages:tDstStage visibilityOptions:tOptions];
2128-
else if(gptGraphics->bRenderEncoderActive)
2129-
[ptDevice->tRenderEncoder barrierAfterQueueStages:tSrcStage beforeStages:tDstStage visibilityOptions:tOptions];
2130-
}
2131-
21322115
void
21332116
pl_graphics_producer_barrier(plCommandBuffer* ptCmdBuffer, plPipelineStageFlags tSrcStages, plPipelineStageFlags tDstStages, plBarrierScope tScope)
21342117
{

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