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JbalkindJbalkind
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Simulation now runs on VCS and verilator for ariane and ost1
1 parent f00ed67 commit 87bd6bd

22 files changed

Lines changed: 88 additions & 66 deletions

‎piton/design/chip/tile/common/rtl/ucb_bus_in.v‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@
2929
////////////////////////////////////////////////////////////////////////
3030
// Global header file includes
3131
////////////////////////////////////////////////////////////////////////
32-
`include "sys.h" // system level definition file which contains the
33-
// time scale definition
32+
//`include "sys.h" // system level definition file which contains the
33+
// // time scale definition
3434

3535
////////////////////////////////////////////////////////////////////////
3636
// Local header file includes / local defines

‎piton/design/chip/tile/common/rtl/ucb_bus_out.v‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@
2929
////////////////////////////////////////////////////////////////////////
3030
// Global header file includes
3131
////////////////////////////////////////////////////////////////////////
32-
`include "sys.h" // system level definition file which
33-
// contains the time scale definition
32+
//`include "sys.h" // system level definition file which
33+
// // contains the time scale definition
3434

3535
////////////////////////////////////////////////////////////////////////
3636
// Local header file includes / local defines

‎piton/design/chip/tile/rtl/tile.v.pyv‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -871,13 +871,13 @@ if (TILE_TYPE == `ARIANE_RV64_TILE) begin : g_ariane_core
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872872
// Could remove this converter after Ariane is changed to send the
873873
// PMesh standard data size
874-
assign transducer_l15_size = (transducer_l15_size_pcx_standard == `PCX_SZ_1B) ? `MSG_DATA_SIZE_1B :
875-
(transducer_l15_size_pcx_standard == `PCX_SZ_2B) ? `MSG_DATA_SIZE_2B :
876-
(transducer_l15_size_pcx_standard == `PCX_SZ_4B) ? `MSG_DATA_SIZE_4B :
877-
(transducer_l15_size_pcx_standard == `PCX_SZ_8B) ? `MSG_DATA_SIZE_8B :
878-
(transducer_l15_size_pcx_standard == `PCX_SZ_16B &&
879-
transducer_l15_rqtype == `PCX_REQTYPE_IFILL &&
880-
~transducer_l15_invalidate_cacheline) ? `MSG_DATA_SIZE_32B : `MSG_DATA_SIZE_16B;
874+
assign transducer_l15_size = (transducer_l15_size_pcx_standard == 3'b000) ? `MSG_DATA_SIZE_1B :
875+
(transducer_l15_size_pcx_standard == 3'b001) ? `MSG_DATA_SIZE_2B :
876+
(transducer_l15_size_pcx_standard == 3'b010) ? `MSG_DATA_SIZE_4B :
877+
(transducer_l15_size_pcx_standard == 3'b011) ? `MSG_DATA_SIZE_8B :
878+
(transducer_l15_size_pcx_standard == 3'b111 &&
879+
transducer_l15_rqtype == `PCX_REQTYPE_IFILL &&
880+
~transducer_l15_invalidate_cacheline) ? `MSG_DATA_SIZE_32B : `MSG_DATA_SIZE_16B;
881881

882882
wire [63:0] ariane_bootaddr;
883883

‎piton/tools/src/sims/manycore.config‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@
5959
-flist=$OST1_ROOT/common/rtl/Flist.clib_common
6060
-flist=$OST1_ROOT/common/rtl/Flist.dft_common
6161
-flist=$OST1_ROOT/common/rtl/Flist.dlib_common
62+
-flist=$DV_ROOT/verif/env/manycore/manycore_ost1.flist
6263
-sparcv9
6364
-config_rtl=PITON_OST1
6465
#endif

‎piton/tools/src/sims/sims,2.0‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -912,6 +912,10 @@ sub regress
912912
} else {
913913
$cmd .= "-other_sim_build " ;
914914
}
915+
$cmd .= "-ost1 " if $opt{ost1} ;
916+
$cmd .= "-ariane " if $opt{ariane} ;
917+
$cmd .= "-pico " if $opt{pico} ;
918+
$cmd .= "-pico_het " if $opt{pico_het} ;
915919
$cmd .= "$buildargs " ;
916920
$cmd .= "-build_id=$build_id " ;
917921

@@ -987,6 +991,10 @@ sub regress
987991
push (@cmd, "-other_sim_run") ;
988992
}
989993
push (@cmd, "-sys=${sys}") ;
994+
push (@cmd, "-ost1") if $opt{ost1} ;
995+
push (@cmd, "-ariane") if $opt{ariane} ;
996+
push (@cmd, "-pico") if $opt{pico} ;
997+
push (@cmd, "-pico_het") if $opt{pico_het} ;
990998
push (@cmd, "-build_id=${build_id}") ;
991999
push (@cmd, "-regress_id=${regress_id}") ;
9921000
push (@cmd, "-alias=${dirname}") ;
@@ -2610,6 +2618,10 @@ sub parse_args
26102618
'dmbr!',
26112619
'dmbr_checker!',
26122620
'oram!',
2621+
'ost1!',
2622+
'ariane!',
2623+
'pico!',
2624+
'pico_het!',
26132625
);
26142626

26152627
# print out all command line arguments + config arguments

‎piton/tools/verilator/my_top.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3131
#include "verilated_vcd_c.h"
3232
#endif
3333

34+
extern "C" void init_jbus_model_call(char *str, int oram);
35+
3436
uint64_t main_time = 0; // Current simulation time
3537
uint64_t clk = 0;
3638
Vcmp_top* top;

‎piton/verif/diag/riscv/rv64/diaglist_riscv64‎

Lines changed: 17 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,72 +1,70 @@
1-
<ariane_tile1 sys=manycore -x_tiles=1 -y_tiles=1 -ariane>
1+
<ariane_tile1 sys=manycore -ariane -x_tiles=1 -y_tiles=1>
22
<cmp_default name=default>
33
// note: these asm tests assume that the RISCV tests have been precompiled with the
44
// correct environment
55
<ariane_tile1_asm_tests_p>
66
<runargs -ariane>
7-
#include "riscv/rv64/rv64ui-p.diaglist"
8-
#include "riscv/rv64/rv64mi-p.diaglist"
9-
#include "riscv/rv64/rv64si-p.diaglist"
10-
#include "riscv/rv64/rv64um-p.diaglist"
7+
#include "riscv/rv64/rv64ui-p.diaglist"
8+
#include "riscv/rv64/rv64mi-p.diaglist"
9+
#include "riscv/rv64/rv64si-p.diaglist"
10+
#include "riscv/rv64/rv64um-p.diaglist"
1111
</runargs>
1212
</ariane_tile1_asm_tests_p>
1313

1414
// note: these asm tests assume that the RISCV tests have been precompiled with the
1515
// correct environment
1616
<ariane_tile1_asm_tests_v>
1717
<runargs -ariane>
18-
#include "riscv/rv64/rv64ui-v.diaglist"
19-
#include "riscv/rv64/rv64um-v.diaglist"
18+
#include "riscv/rv64/rv64ui-v.diaglist"
19+
#include "riscv/rv64/rv64um-v.diaglist"
2020
</runargs>
2121
</ariane_tile1_asm_tests_v>
2222

2323
// note: these asm tests assume that the RISCV tests have been precompiled with the
2424
// correct environment
2525
<ariane_tile1_amo_tests_p>
2626
<runargs -ariane>
27-
#include "riscv/rv64/rv64ua-p.diaglist"
27+
#include "riscv/rv64/rv64ua-p.diaglist"
2828
</runargs>
2929
</ariane_tile1_amo_tests_p>
3030

3131
// note: these asm tests assume that the RISCV tests have been precompiled with the
3232
// correct environment
3333
<ariane_tile1_amo_tests_v>
3434
<runargs -ariane>
35-
#include "riscv/rv64/rv64ua-v.diaglist"
35+
#include "riscv/rv64/rv64ua-v.diaglist"
3636
</runargs>
3737
</ariane_tile1_amo_tests_v>
3838

3939
// note: these asm tests assume that the RISCV tests have been precompiled with the
4040
// correct environment
4141
<ariane_tile1_fp_tests_p>
4242
<runargs -ariane>
43-
#include "riscv/rv64/rv64uf-p.diaglist"
44-
#include "riscv/rv64/rv64ud-p.diaglist"
43+
#include "riscv/rv64/rv64uf-p.diaglist"
44+
#include "riscv/rv64/rv64ud-p.diaglist"
4545
</runargs>
4646
</ariane_tile1_fp_tests_p>
4747

4848
// note: these asm tests assume that the RISCV tests have been precompiled with the
4949
// correct environment
5050
<ariane_tile1_fp_tests_v>
5151
<runargs -ariane>
52-
#include "riscv/rv64/rv64uf-v.diaglist"
53-
#include "riscv/rv64/rv64ud-v.diaglist"
52+
#include "riscv/rv64/rv64uf-v.diaglist"
53+
#include "riscv/rv64/rv64ud-v.diaglist"
5454
</runargs>
5555
</ariane_tile1_fp_tests_v>
5656

5757
// note: these asm tests assume that the RISCV tests have been precompiled with the
5858
// correct environment
5959
<ariane_tile1_benchmarks>
6060
<runargs -ariane>
61-
#include "riscv/rv64/rv64-benchmarks.diaglist"
61+
#include "riscv/rv64/rv64-benchmarks.diaglist"
6262
</runargs>
6363
</ariane_tile1_benchmarks>
6464

6565
<ariane_tile1_simple>
66-
<runargs -x_tiles=1 -y_tiles=1 -ariane -rtl_timeout 1000000>
67-
ariane-hello-world hello_world.c
68-
ariane-accu accu_test.c
69-
ariane-amo-align amo_align.c
66+
<runargs -ariane>
67+
#include "riscv/rv64/rv64-simple.diaglist"
7068
</runargs>
7169
</ariane_tile1_simple>
7270

@@ -77,7 +75,7 @@
7775
<cmp_default name=default>
7876
<ariane_tile16_simple>
7977
<runargs -x_tiles=4 -y_tiles=4 hello_world.c -ariane -finish_mask=1111111111111111 -rtl_timeout 10000000>
80-
ariane-hello-world-many hello_world_many.c
78+
ariane-hello-world-many hello_world_many.c
8179
</runargs>
8280
</ariane_tile16_simple>
8381
</cmp_default>

‎piton/verif/diag/riscv/rv64/rv64-simple.diaglist‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
<rv64-simple sys=manycore -x_tiles=1 -y_tiles=1>
2+
<runargs -x_tiles=1 -y_tiles=1 -ariane -rtl_timeout=1000000>
3+
ariane-hello-world hello_world.c
4+
ariane-accu accu_test.c
5+
ariane-amo-align amo_align.c
6+
</runargs>
7+
</rv64-simple>

‎piton/verif/env/common/fake_mem_ctrl.v‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,6 @@
3939

4040
`include "l2.tmp.h"
4141
`include "define.tmp.h"
42-
`include "iop.h"
4342

4443
`define MEM_ADDR_WIDTH 64
4544

‎piton/verif/env/manycore/async_fifo_mon.v.pyv‎

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Original file line numberDiff line numberDiff line change
@@ -40,7 +40,6 @@
4040

4141

4242

43-
`include "iop.h"
4443
`include "define.tmp.h"
4544
`include "cross_module.tmp.h"
4645

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