Add author and final updates

Author: Adarsh Nair Mullachery

boards/nucleo-u385rg-q/include/periph_conf.h

@@ -6,7 +6,8 @@
  *
  * @file
  * @brief       Minimal peripheral configuration for STM32U385 (bring-up)
- *
+ * 
+ * @author      Adarsh Nair Mullachery
  * This file is intentionally minimal to allow first successful boot
  * and GPIO operation (blinky).
  */

cpu/stm32/dist/irqs/gen_irqs.py

@@ -137,21 +137,7 @@ def main(args):
     """Main function."""
     cpu_lines = list_cpu_lines(args.cmsis_dir, args.cpu_fam)
 
-    # STM32U3: IRQ count is fixed and cannot be reliably parsed
-    # Follow the same approach as STM32U5
-    if args.cpu_fam == "u3":
-        context = {
-            "cpu_fam": args.cpu_fam,
-            "cpu_lines": [
-                {
-                    "line": cpu_line.upper().replace("X", "x"),
-                    "irq_numof": 125,
-                }
-                for cpu_line in cpu_lines
-            ]
-        }
-        generate_irqs(context)
-        return
+    
     context = {
         "cpu_fam": args.cpu_fam,
         "cpu_lines": [

cpu/stm32/include/clk/u3/cfg_clock_default.h

@@ -1,3 +1,19 @@
+
+#pragma once
+
+/**
+ * @ingroup     cpu_stm32
+ * @{
+ *
+ * @file
+ * @brief       Default STM32U3 clock configuration (bring-up)
+ *
+ * This configuration is intentionally conservative for early bring-up.
+ * By default it uses HSI (16 MHz) as SYSCLK and disables PLL usage.
+ *
+ * @author      <Adarsh Nair Mullachery>
+ * @}
+ */
 /* cpu/stm32/include/clk/u3/cfg_clock_default.h */
 #pragma once
 

cpu/stm32/include/periph/u3/periph_cpu.h

@@ -1,5 +1,15 @@
 #pragma once
 
+/**
+ * @ingroup     cpu_stm32
+ * @{
+ *
+ * @file
+ * @brief       STM32U3 family specific peripheral CPU definitions
+ *
+ * @author      Adarsh Nair
+ */
+
 #ifdef __cplusplus
 extern "C" {
 #endif

cpu/stm32/kconfigs/u3/Kconfig

@@ -1,4 +1,7 @@
-
+/*
+ * SPDX-FileCopyrightText: 2026 Adarsh Nair Mullachery
+ * SPDX-License-Identifier: LGPL-2.1-only
+ */
 
 config CPU_FAM_U3
     bool

cpu/stm32/kconfigs/u3/Kconfig.lines

@@ -1,7 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Adarsh Nair Mullachery
+ * SPDX-License-Identifier: LGPL-2.1-only
+ */
 
-# This file was auto-generated from ST ProductsList.xlsx sheet using the
-# script in cpu/stm32/dist/kconfig/gen_kconfig.py
-# See cpu/stm32/dist/kconfig/README.md for details
 
 # CPU lines
 config CPU_LINE_STM32U385XX

cpu/stm32/kconfigs/u3/Kconfig.models

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Adarsh Nair Mullachery
+ * SPDX-License-Identifier: LGPL-2.1-only
+ */
+
 # CPU models
 
 config CPU_MODEL_STM32U385CG

cpu/stm32/stmclk/stmclk_u3.c

@@ -1,16 +1,11 @@
-/*
- 
- */
-
 /**
  * @ingroup     cpu_stm32
  * @{
  *
  * @file
- * @brief       Implementation of STM32 clock configuration for U3 family
+ * @brief       STM32U3 clock initialization
  *
- * 
- * @}
+ * @author      Adarsh Nair Mullachery 
  */
 
 #include "cpu.h"