From 273726596d076d38afda8a189d4cff331bd53b42 Mon Sep 17 00:00:00 2001 From: Sander Huisman Date: Thu, 19 Mar 2026 14:49:50 +0100 Subject: [PATCH 1/2] drivers/at86rf2xx: fix sub-ghz page setting --- drivers/at86rf2xx/at86rf2xx.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/at86rf2xx/at86rf2xx.c b/drivers/at86rf2xx/at86rf2xx.c index ee5626abcea7..dfec48c64aed 100644 --- a/drivers/at86rf2xx/at86rf2xx.c +++ b/drivers/at86rf2xx/at86rf2xx.c @@ -97,9 +97,15 @@ void at86rf2xx_reset(at86rf2xx_t *dev) at86rf2xx_set_option(dev, AT86RF2XX_OPT_CSMA, true); } - /* enable safe mode (protect RX FIFO until reading data starts) */ - at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, - AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE); + /** + * enable safe mode (protect RX FIFO until reading data starts) + * + * NOTE: sub-ghz settings in TRX_CTRL_2 are configured in + * at86rf2xx_configure_phy() so use read-modify-write + */ + tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); + tmp |= AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE; + at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, tmp); #if !AT86RF2XX_IS_PERIPH /* don't populate masked interrupt flags to IRQ_STATUS register */ From 20330667de5cbc27449760e1f93ef518a9ccd527 Mon Sep 17 00:00:00 2001 From: Sander Huisman Date: Tue, 24 Mar 2026 08:00:51 +0100 Subject: [PATCH 2/2] drivers/at86rf2xx: Moved safe mode configuration to at86rf2xx_configure_phy --- drivers/at86rf2xx/at86rf2xx.c | 10 ---------- drivers/at86rf2xx/at86rf2xx_getset.c | 9 +++++++-- 2 files changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/at86rf2xx/at86rf2xx.c b/drivers/at86rf2xx/at86rf2xx.c index dfec48c64aed..2ec5254dff69 100644 --- a/drivers/at86rf2xx/at86rf2xx.c +++ b/drivers/at86rf2xx/at86rf2xx.c @@ -97,16 +97,6 @@ void at86rf2xx_reset(at86rf2xx_t *dev) at86rf2xx_set_option(dev, AT86RF2XX_OPT_CSMA, true); } - /** - * enable safe mode (protect RX FIFO until reading data starts) - * - * NOTE: sub-ghz settings in TRX_CTRL_2 are configured in - * at86rf2xx_configure_phy() so use read-modify-write - */ - tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); - tmp |= AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE; - at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, tmp); - #if !AT86RF2XX_IS_PERIPH /* don't populate masked interrupt flags to IRQ_STATUS register */ tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_1); diff --git a/drivers/at86rf2xx/at86rf2xx_getset.c b/drivers/at86rf2xx/at86rf2xx_getset.c index 70cd8e5fa7b7..3df6626db1c9 100644 --- a/drivers/at86rf2xx/at86rf2xx_getset.c +++ b/drivers/at86rf2xx/at86rf2xx_getset.c @@ -166,11 +166,12 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page, int16 (void) chan; (void) txpower; + uint8_t trx_ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); + #if AT86RF2XX_HAVE_SUBGHZ /* The TX power register must be updated after changing the channel if * moving between bands. */ - uint8_t trx_ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2); uint8_t rf_ctrl0 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RF_CTRL_0); /* Clear previous configuration for PHY mode */ @@ -195,10 +196,14 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page, int16 rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__1DB; } - at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, trx_ctrl2); at86rf2xx_reg_write(dev, AT86RF2XX_REG__RF_CTRL_0, rf_ctrl0); #endif + /* enable safe mode (protect RX FIFO until reading data starts) */ + trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE; + + at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, trx_ctrl2); + uint8_t phy_cc_cca = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_CC_CCA); /* Clear previous configuration for channel number */ phy_cc_cca &= ~(AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);