Merge remote-tracking branch 'origin/develop' into dpp-refactor-blockwise-reduce

Author: stefankoncarevic

.github/workflows/ci.yml

@@ -1,4 +1,4 @@
-name: Python Lint and Format Check
+name: rocMLIR GitHub Actions
 
 on:
   pull_request:
@@ -9,6 +9,8 @@ on:
       - "mlir/**"
       - "external/**"
       - "!external/llvm-project/**"
+      - ".github/workflows/**"
+      - "pip_requirements.txt"
   push:
     branches:
       - develop
@@ -17,8 +19,11 @@ on:
       - "mlir/**"
       - "external/**"
       - "!external/llvm-project/**"
+      - ".github/workflows/**"
+      - "pip_requirements.txt"
 jobs:
-  py-checks:
+  format-and-lint-checks:
+    name: Python format and lint checks
     runs-on: ubuntu-latest
     container:
       image: python:3.10
@@ -95,3 +100,30 @@ jobs:
       - name: No Python changes in mlir/
         if: steps.changes.outputs.files == ''
         run: echo "No changed *.py files under mlir/ – skipping."
+
+  python-tests:
+    name: Python performance script tests
+    runs-on: ubuntu-latest
+    container:
+      image: python:3.10
+      options: --user root
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0
+
+      - name: Fix git ownership
+        run: |
+          git config --global --add safe.directory "$GITHUB_WORKSPACE"
+
+      - name: Install dependencies
+        run: |
+          python -m pip install --upgrade pip
+          pip install -r pip_requirements.txt
+
+      - name: Run performance script tests (no GPU)
+        run: |
+          cd mlir/utils/performance && python -m pytest tests/ -v
+        env:
+          # Tests mock HIP/GPU; no ROCm or GPU required
+          PYTHONPATH: ${{ github.workspace }}/mlir/utils/performance

mlir/include/mlir/Conversion/MIGraphXToLinalg/MIGraphXToLinalg.h

@@ -39,6 +39,10 @@ void populateMIGraphXToLinalgBoundaryDialectConversion(
 /// migraphx.mlir.as_logical_shape and migraphx.mlir.as_underlying_shape.
 void populateMIGraphXFuncBoundaryToLinalgConversionPatterns(
     RewritePatternSet &target, TypeConverter &typeConverter);
+
+/// Populates conversion patterns for function boundaries mhal.launcher
+void populateMIGraphXToLinalgMHALLauncherConversion(
+    RewritePatternSet &target, TypeConverter &typeConverter);
 } // namespace migraphx
 } // namespace mlir
 

mlir/include/mlir/Conversion/RocMLIRPasses.td

@@ -144,7 +144,7 @@ def MIGraphXToLinalgPass : Pass<"migraphx-to-linalg", "::mlir::func::FuncOp"> {
   }];
 
   let dependentDialects = ["arith::ArithDialect", "tensor::TensorDialect",
-                           "linalg::LinalgDialect"];
+                           "linalg::LinalgDialect", "rock::RockDialect"];
 }
 
 //===----------------------------------------------------------------------===//

mlir/include/mlir/Dialect/Rock/IR/MfmaInsnGroup.h

@@ -31,7 +31,13 @@ enum class MfmaTypeId : uint32_t {
   Fp8Fp8TyId,
   Fp8Bf8TyId,
   Bf8Fp8TyId,
-  Bf8Bf8TyId
+  Bf8Bf8TyId,
+  // FP8 via scaled MFMA (uses mfma_scale_f32_16x16x128_f8f6f4 with cbsz=0)
+  // These provide larger K dimension (128 for 16x16, 64 for 32x32)
+  Fp8Fp8ScaledTyId,
+  Fp8Bf8ScaledTyId,
+  Bf8Fp8ScaledTyId,
+  Bf8Bf8ScaledTyId
 };
 
 struct MfmaInsnInfo {
@@ -71,7 +77,8 @@ class MfmaInsn {
   MfmaInsnAttr getAttr() const;
   Type getArgTypeFor(Type elementTypeA);
   VectorType getRetType(Type elementType);
-  bool isCoherentWithK(int64_t kPack, int64_t kPerBlock);
+  bool isCoherentWithK(int64_t kPack, int64_t kPerBlock,
+                       int64_t scheduleVersion);
 };
 
 template <typename T>
@@ -138,7 +145,8 @@ class MfmaInsnGroup {
 public:
   static FailureOr<MfmaInsnGroup> select(Type elementTypeA, Type elementTypeB,
                                          StringRef arch, int64_t mnPerXdl,
-                                         int64_t kPack, int64_t kPackPerBlock);
+                                         int64_t kPack, int64_t kPackPerBlock,
+                                         int64_t scheduleVersion);
   MfmaInsnGroup(Type elementTypeA, Type elementTypeB, const MfmaInsn &insn,
                 const MfmaInsnGroupAttr &groupAttr);
   int64_t getMRepeats(int64_t mPerWave);
@@ -150,8 +158,13 @@ class MfmaInsnGroup {
   Type getArgTypeA();
   Type getArgTypeB();
   VectorType getRetType();
-  bool isCoherentWithK(int64_t kPack, int64_t kPerBlock);
+  bool isCoherentWithK(int64_t kPack, int64_t kPerBlock,
+                       int64_t scheduleVersion);
   SmallString<16> getROCDLIntrinsicName() { return groupAttr.insn; }
+
+  // Check if this is FP8 using scaled MFMA (mfma_scale with cbsz=0, blgp=0)
+  // These instructions have larger K dimension (128 for 16x16, 64 for 32x32)
+  bool isScaledFp8() const;
 };
 
 } // namespace rock

mlir/include/mlir/Dialect/Rock/IR/RockAttrDefs.td

@@ -59,6 +59,22 @@ def ConvOpBwdWeightType : I32EnumAttrCase<"BwdWeight", 2, "conv_bwd_weight">;
 def ConvOpTypes : Rock_I32Enum<"ConvOpType", "The type of a convolution operation",
   [ConvOpType, ConvOpBwdDataType, ConvOpBwdWeightType]>;
 
+/// LinalgConvType
+def LinalgConv_1D : I32EnumAttrCase<"Conv1dNgchGkch", 0, "conv1d_ngch_gkch">;
+def LinalgConv_2D
+    : I32EnumAttrCase<"Conv2dNgchwGkchw", 1, "conv2d_ngchw_gkchw">;
+def LinalgConv_3D
+    : I32EnumAttrCase<"Conv3dNgchwdGkchwd", 2, "conv3d_ngchwd_gkchwd">;
+
+def LinalgConvType
+    : Rock_I32Enum<"LinalgConvType",
+                   "Hints for the linalg.generic convolution ops used by "
+                   "linalg-to-rock lowering",
+                   [LinalgConv_1D, LinalgConv_2D, LinalgConv_3D]>;
+
+def LinalgConvTypeAttr
+    : EnumAttr<Rock_Dialect, LinalgConvType, "LinalgConvType">;
+
 /// Kerneltype
 def KernelTypeConv : I32EnumAttrCase<"Conv", 0>;
 def KernelTypeConvBwdData : I32EnumAttrCase<"ConvBwdData", 1>;